diff options
-rw-r--r-- | src/soc/intel/skylake/chip.h | 3 | ||||
-rw-r--r-- | src/soc/intel/skylake/chip_fsp20.c | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 445dcb67c1..fbd10a918c 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -402,6 +402,9 @@ struct soc_intel_skylake_config { */ u32 PrmrrSize; + /* Enable/Disable host reads to PMC XRAM registers */ + u8 PchPmPmcReadDisable; + /* Statically clock gate 8254 PIT. */ u8 clock_gate_8254; diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 851c957624..2d9b864629 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -258,6 +258,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->FastPkgCRampDisableGt = config->FastPkgCRampDisableGt; params->FastPkgCRampDisableSa = config->FastPkgCRampDisableSa; + /* Enable PMC XRAM read */ + tconfig->PchPmPmcReadDisable = config->PchPmPmcReadDisable; + soc_irq_settings(params); } |