diff options
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage_fsp20.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 1c63250d1f..9e871254cb 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -237,6 +237,9 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) m_cfg->TraceHubMemReg0Size = config->TraceHubMemReg0Size; m_cfg->TraceHubMemReg1Size = config->TraceHubMemReg1Size; + /* Enable SMBus controller based on config */ + m_cfg->SmbusEnable = config->SmbusEnable; + mainboard_memory_init_params(mupd); } |