diff options
-rw-r--r-- | src/arch/x86/include/arch/io.h | 2 | ||||
-rw-r--r-- | src/device/Kconfig | 4 | ||||
-rw-r--r-- | src/device/device_util.c | 28 | ||||
-rw-r--r-- | src/device/pci_device.c | 5 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/debug.c | 4 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/ht_config.c | 21 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/ht_config.h | 2 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.c | 9 |
8 files changed, 3 insertions, 72 deletions
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index 9987578c97..3130f64728 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -267,7 +267,7 @@ static inline pci_devfn_t pci_io_locate_device(unsigned pci_id, pci_devfn_t dev) static inline pci_devfn_t pci_locate_device(unsigned pci_id, pci_devfn_t dev) { - for(; dev <= PCI_DEV(255|(((1<<CONFIG_PCI_BUS_SEGN_BITS)-1)<<8), 31, 7); dev += PCI_DEV(0,0,1)) { + for(; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0,0,1)) { unsigned int id; id = pci_read_config32(dev, 0); if (id == pci_id) { diff --git a/src/device/Kconfig b/src/device/Kconfig index 42a68d296a..7f43888838 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -259,10 +259,6 @@ config PCIEXP_CLK_PM help Detect and enable Clock Power Management on PCIe. -config PCI_BUS_SEGN_BITS - int - default 0 - config EARLY_PCI_BRIDGE bool "Early PCI bridge" depends on PCI diff --git a/src/device/device_util.c b/src/device/device_util.c index 62a815f939..d970429ff2 100644 --- a/src/device/device_util.c +++ b/src/device/device_util.c @@ -251,20 +251,11 @@ const char *dev_path(device_t dev) memcpy(buffer, "Root Device", 12); break; case DEVICE_PATH_PCI: -#if CONFIG_PCI_BUS_SEGN_BITS - snprintf(buffer, sizeof (buffer), - "PCI: %04x:%02x:%02x.%01x", - dev->bus->secondary >> 8, - dev->bus->secondary & 0xff, - PCI_SLOT(dev->path.pci.devfn), - PCI_FUNC(dev->path.pci.devfn)); -#else snprintf(buffer, sizeof (buffer), "PCI: %02x:%02x.%01x", dev->bus->secondary, PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn)); -#endif break; case DEVICE_PATH_PNP: snprintf(buffer, sizeof (buffer), "PNP: %04x.%01x", @@ -643,14 +634,8 @@ void report_resource_stored(device_t dev, struct resource *resource, buf[0] = '\0'; if (resource->flags & IORESOURCE_PCI_BRIDGE) { -#if CONFIG_PCI_BUS_SEGN_BITS - snprintf(buf, sizeof (buf), - "bus %04x:%02x ", dev->bus->secondary >> 8, - dev->link_list->secondary & 0xff); -#else snprintf(buf, sizeof (buf), "bus %02x ", dev->link_list->secondary); -#endif } printk(BIOS_DEBUG, "%s %02lx <- [0x%010llx - 0x%010llx] size 0x%08llx " "gran 0x%02x %s%s%s\n", dev_path(dev), resource->index, @@ -855,19 +840,6 @@ void show_one_resource(int debug_level, struct device *dev, end = resource_end(resource); buf[0] = '\0'; -/* - if (resource->flags & IORESOURCE_BRIDGE) { -#if CONFIG_PCI_BUS_SEGN_BITS - snprintf(buf, sizeof (buf), "bus %04x:%02x ", - dev->bus->secondary >> 8, - dev->link[0].secondary & 0xff); -#else - snprintf(buf, sizeof (buf), - "bus %02x ", dev->link[0].secondary); -#endif - } -*/ - do_printk(debug_level, "%s %02lx <- [0x%010llx - 0x%010llx] " "size 0x%08llx gran 0x%02x %s%s%s\n", dev_path(dev), resource->index, base, end, resource->size, resource->gran, diff --git a/src/device/pci_device.c b/src/device/pci_device.c index 127ee32fe2..4651258ce8 100644 --- a/src/device/pci_device.c +++ b/src/device/pci_device.c @@ -1090,12 +1090,7 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, struct device *old_devices; struct device *child; -#if CONFIG_PCI_BUS_SEGN_BITS - printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %04x:%02x\n", - bus->secondary >> 8, bus->secondary & 0xff); -#else printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %02x\n", bus->secondary); -#endif /* Maximum sane devfn is 0xFF. */ if (max_devfn > 0xff) { diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c index d1fdaf832c..6aed390a6b 100644 --- a/src/northbridge/amd/amdfam10/debug.c +++ b/src/northbridge/amd/amdfam10/debug.c @@ -33,11 +33,7 @@ static inline void print_debug_addr(const char *str, void *val) static void print_debug_pci_dev(u32 dev) { -#if !CONFIG_PCI_BUS_SEGN_BITS printk(BIOS_DEBUG, "PCI: %02x:%02x.%02x", (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7); -#else - printk(BIOS_DEBUG, "PCI: %04x:%02x:%02x.%02x", (dev>>28) & 0x0f, (dev>>20) & 0xff, (dev>>15) & 0x1f, (dev>>12) & 0x7); -#endif } static inline void print_pci_devices(void) diff --git a/src/northbridge/amd/amdfam10/ht_config.c b/src/northbridge/amd/amdfam10/ht_config.c index cfd8a24526..efb3148470 100644 --- a/src/northbridge/amd/amdfam10/ht_config.c +++ b/src/northbridge/amd/amdfam10/ht_config.c @@ -76,27 +76,6 @@ void clear_config_map_reg(u32 nodeid, u32 linkn, u32 ht_c_index, } } -#if CONFIG_PCI_BUS_SEGN_BITS -u32 check_segn(device_t dev, u32 segbusn, u32 nodes, - sys_info_conf_t *sysinfo) -{ - //check segbusn here, We need every node have the same segn - if ((segbusn & 0xff)>(0xe0-1)) {// use next segn - u32 segn = (segbusn >> 8) & 0x0f; - segn++; - segbusn = segn<<8; - } - if (segbusn>>8) { - u32 val; - val = pci_read_config32(dev, 0x160); - val &= ~(0xf<<25); - val |= (segbusn & 0xf00)<<(25-8); - pci_write_config32(dev, 0x160, val); - } - - return segbusn; -} -#endif u32 get_ht_c_index(u32 nodeid, u32 linkn, sys_info_conf_t *sysinfo) { diff --git a/src/northbridge/amd/amdfam10/ht_config.h b/src/northbridge/amd/amdfam10/ht_config.h index 9b82f545b6..54356c1800 100644 --- a/src/northbridge/amd/amdfam10/ht_config.h +++ b/src/northbridge/amd/amdfam10/ht_config.h @@ -34,8 +34,6 @@ void set_config_map_reg(u32 nodeid, u32 linkn, u32 ht_c_index, u32 nodes); void clear_config_map_reg(u32 nodeid, u32 linkn, u32 ht_c_index, u32 busn_min, u32 busn_max, u32 nodes); -u32 check_segn(device_t dev, u32 segbusn, u32 nodes, - sys_info_conf_t *sysinfo); void store_ht_c_conf_bus(u32 nodeid, u32 linkn, u32 ht_c_index, u32 busn_min, u32 busn_max, diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 503dcf9d65..5ce7ae66d7 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -167,7 +167,6 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool u32 max_bus; u32 min_bus; u32 busses; - u32 segn = max>>8; #if CONFIG_SB_HT_CHAIN_ON_BUS0 > 1 u32 busn = max&0xff; #endif @@ -211,7 +210,7 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool else { min_bus = ((busn>>3) + 1) << 3; // one node can have 8 link and segn is the same } - max = min_bus | (segn<<8); + max = min_bus; #else //other ... else { @@ -221,7 +220,7 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool #else min_bus = ++max; #endif - max_bus = 0xfc | (segn<<8); + max_bus = 0xfc; link->secondary = min_bus; link->subordinate = max_bus; @@ -299,10 +298,6 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max) max = amdfam10_scan_chain(dev, nodeid, link, is_sblink, max); } -#if CONFIG_PCI_BUS_SEGN_BITS - max = check_segn(dev, max, sysconf.nodes, &sysconf); -#endif - for (link = dev->link_list; link; link = link->next) { bool is_sblink = (nodeid == 0) && (link->link_num == sblink); if ((CONFIG_SB_HT_CHAIN_ON_BUS0 > 0) && is_sblink) |