diff options
| -rw-r--r-- | src/soc/amd/picasso/include/soc/smbus.h | 27 | ||||
| -rw-r--r-- | src/soc/amd/picasso/sm.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/picasso/smbus.c | 22 | ||||
| -rw-r--r-- | src/soc/amd/picasso/southbridge.c | 1 |
4 files changed, 12 insertions, 40 deletions
diff --git a/src/soc/amd/picasso/include/soc/smbus.h b/src/soc/amd/picasso/include/soc/smbus.h deleted file mode 100644 index 524be7791d..0000000000 --- a/src/soc/amd/picasso/include/soc/smbus.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2010 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __PICASSO_SMBUS_H__ -#define __PICASSO_SMBUS_H__ - -#include <stdint.h> -#include <soc/iomap.h> - -int do_smbus_read_byte(u32 mmio, u8 device, u8 address); -int do_smbus_write_byte(u32 mmio, u8 device, u8 address, u8 val); -int do_smbus_recv_byte(u32 mmio, u8 device); -int do_smbus_send_byte(u32 mmio, u8 device, u8 val); - -#endif /* __PICASSO_SMBUS_H__ */ diff --git a/src/soc/amd/picasso/sm.c b/src/soc/amd/picasso/sm.c index 438909d7cb..f0ba559f3b 100644 --- a/src/soc/amd/picasso/sm.c +++ b/src/soc/amd/picasso/sm.c @@ -18,10 +18,10 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/smbus.h> +#include <device/smbus_host.h> #include <cpu/x86/lapic.h> #include <arch/ioapic.h> #include <soc/southbridge.h> -#include <soc/smbus.h> /* * The southbridge enables all USB controllers by default in SMBUS Control. diff --git a/src/soc/amd/picasso/smbus.c b/src/soc/amd/picasso/smbus.c index f5a9d604ea..5474c5cd45 100644 --- a/src/soc/amd/picasso/smbus.c +++ b/src/soc/amd/picasso/smbus.c @@ -15,8 +15,8 @@ #include <stdint.h> #include <console/console.h> +#include <device/smbus_host.h> #include <amdblocks/acpimmio.h> -#include <soc/smbus.h> #include <soc/southbridge.h> /* @@ -25,7 +25,7 @@ */ #define SMBUS_TIMEOUT (100 * 1000 * 10) -static u8 controller_read8(u32 base, u8 reg) +static u8 controller_read8(uintptr_t base, u8 reg) { switch (base) { case ACPIMMIO_SMBUS_BASE: @@ -33,13 +33,13 @@ static u8 controller_read8(u32 base, u8 reg) case ACPIMMIO_ASF_BASE: return asf_read8(reg); default: - printk(BIOS_ERR, "Error attempting to read SMBus at address 0x%x\n", + printk(BIOS_ERR, "Error attempting to read SMBus at address 0x%lx\n", base); } return 0xff; } -static void controller_write8(u32 base, u8 reg, u8 val) +static void controller_write8(uintptr_t base, u8 reg, u8 val) { switch (base) { case ACPIMMIO_SMBUS_BASE: @@ -49,12 +49,12 @@ static void controller_write8(u32 base, u8 reg, u8 val) asf_write8(reg, val); break; default: - printk(BIOS_ERR, "Error attempting to write SMBus at address 0x%x\n", + printk(BIOS_ERR, "Error attempting to write SMBus at address 0x%lx\n", base); } } -static int smbus_wait_until_ready(u32 mmio) +static int smbus_wait_until_ready(uintptr_t mmio) { u32 loops; loops = SMBUS_TIMEOUT; @@ -70,7 +70,7 @@ static int smbus_wait_until_ready(u32 mmio) return -2; /* time out */ } -static int smbus_wait_until_done(u32 mmio) +static int smbus_wait_until_done(uintptr_t mmio) { u32 loops; loops = SMBUS_TIMEOUT; @@ -89,7 +89,7 @@ static int smbus_wait_until_done(u32 mmio) return -3; /* timeout */ } -int do_smbus_recv_byte(u32 mmio, u8 device) +int do_smbus_recv_byte(uintptr_t mmio, u8 device) { u8 byte; @@ -114,7 +114,7 @@ int do_smbus_recv_byte(u32 mmio, u8 device) return byte; } -int do_smbus_send_byte(u32 mmio, u8 device, u8 val) +int do_smbus_send_byte(uintptr_t mmio, u8 device, u8 val) { u8 byte; @@ -139,7 +139,7 @@ int do_smbus_send_byte(u32 mmio, u8 device, u8 val) return 0; } -int do_smbus_read_byte(u32 mmio, u8 device, u8 address) +int do_smbus_read_byte(uintptr_t mmio, u8 device, u8 address) { u8 byte; @@ -167,7 +167,7 @@ int do_smbus_read_byte(u32 mmio, u8 device, u8 address) return byte; } -int do_smbus_write_byte(u32 mmio, u8 device, u8 address, u8 val) +int do_smbus_write_byte(uintptr_t mmio, u8 device, u8 address, u8 val) { u8 byte; diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c index 310d9a2962..56fe88de3c 100644 --- a/src/soc/amd/picasso/southbridge.c +++ b/src/soc/amd/picasso/southbridge.c @@ -29,7 +29,6 @@ #include <amdblocks/acpi.h> #include <soc/cpu.h> #include <soc/southbridge.h> -#include <soc/smbus.h> #include <soc/smi.h> #include <soc/amd_pci_int_defs.h> #include <delay.h> |