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-rw-r--r--src/mainboard/google/hatch/variants/baseboard/devicetree.cb5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index 7dd41a2a3a..e39f140588 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -47,6 +47,11 @@ chip soc/intel/cannonlake
# Unlock GPIO pads
register "PchUnlockGpioPads" = "1"
+ register "PchPmSlpS3MinAssert" = "2" # 50ms
+ register "PchPmSlpS4MinAssert" = "1" # 1s
+ register "PchPmSlpSusMinAssert" = "1" # 500ms
+ register "PchPmSlpAMinAssert" = "3" # 2s
+
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 0
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 1
register "usb2_ports[2]" = "USB2_PORT_SHORT(OC3)" # Type-A Port 0