diff options
| -rw-r--r-- | src/mainboard/via/epia/auto.c | 2 | ||||
| -rw-r--r-- | src/mainboard/via/epia/failover.c | 17 | ||||
| -rw-r--r-- | src/southbridge/via/vt8231/vt8231_early_serial.c | 15 | ||||
| -rw-r--r-- | targets/via/epia/Config.lb | 6 |
4 files changed, 20 insertions, 20 deletions
diff --git a/src/mainboard/via/epia/auto.c b/src/mainboard/via/epia/auto.c index 859aadc614..31bb04363c 100644 --- a/src/mainboard/via/epia/auto.c +++ b/src/mainboard/via/epia/auto.c @@ -52,7 +52,9 @@ static inline int spd_read_byte(unsigned device, unsigned address) static void main(void) { + unsigned long x; /* init_timer();*/ + outb(5, 0x80); enable_vt8231_serial(); uart_init(); diff --git a/src/mainboard/via/epia/failover.c b/src/mainboard/via/epia/failover.c index 8eeeaef7e1..bd0df4e89d 100644 --- a/src/mainboard/via/epia/failover.c +++ b/src/mainboard/via/epia/failover.c @@ -5,20 +5,13 @@ #include <arch/io.h> #include "arch/romcc_io.h" #include "pc80/mc146818rtc_early.c" -#include "southbridge/amd/amd8111/amd8111_enable_rom.c" -#include "northbridge/amd/amdk8/early_ht.c" #include "cpu/p6/boot_cpu.c" -#include "northbridge/amd/amdk8/reset_test.c" static void main(void) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(0); - - /* Setup the 8111 */ - amd8111_enable_rom(); + /* for now, just always assume failure */ +#if 0 /* Is this a cpu reset? */ if (cpu_init_detected()) { if (last_boot_normal()) { @@ -27,12 +20,10 @@ static void main(void) asm("jmp __cpu_reset"); } } - /* Is this a secondary cpu? */ - else if (!boot_cpu() && last_boot_normal()) { - asm("jmp __normal_image"); - } + /* This is the primary cpu how should I boot? */ else if (do_normal_boot()) { asm("jmp __normal_image"); } +#endif } diff --git a/src/southbridge/via/vt8231/vt8231_early_serial.c b/src/southbridge/via/vt8231/vt8231_early_serial.c index 168ee07377..ca7831df42 100644 --- a/src/southbridge/via/vt8231/vt8231_early_serial.c +++ b/src/southbridge/via/vt8231/vt8231_early_serial.c @@ -31,19 +31,24 @@ vt8231_writesioword(uint16_t reg, uint16_t val) { static void enable_vt8231_serial(void) { + unsigned long x; + uint8_t c; device_t dev; - - dev = pci_locate_device(PCI_ID(0x1106,0x3065), 0); + outb(6, 0x80); + dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0); if (dev == PCI_DEV_INVALID) { + outb(7, 0x80); die("Serial controller not found\r\n"); } - /* first, you have to enable the superio and superio config. - put a 3 in devfn 38 reg 85 + put a 6 reg 80 */ - pci_write_config8(dev, 0x85, 3); + c = pci_read_config8(dev, 0x50); + c |= 6; + pci_write_config8(dev, 0x50, c); + outb(2, 0x80); // now go ahead and set up com1. // set address vt8231_writesuper(0xf4, 0xfe); diff --git a/targets/via/epia/Config.lb b/targets/via/epia/Config.lb index d92f0c61ff..f9d0ca5dcf 100644 --- a/targets/via/epia/Config.lb +++ b/targets/via/epia/Config.lb @@ -91,7 +91,8 @@ romimage "normal" option ROM_IMAGE_SIZE=0x10000 option LINUXBIOS_EXTRA_VERSION=".0Normal" mainboard via/epia - payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf +# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf + payload /etc/hosts end romimage "fallback" @@ -99,7 +100,8 @@ romimage "fallback" option ROM_IMAGE_SIZE=0x10000 option LINUXBIOS_EXTRA_VERSION=".0Fallback" mainboard via/epia - payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf +# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf + payload /etc/hosts end buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" |