diff options
| -rw-r--r-- | src/cpu/amd/pi/00730F01/update_microcode.c | 2 | ||||
| -rw-r--r-- | src/include/cpu/amd/msr.h | 1 | ||||
| -rw-r--r-- | src/soc/amd/common/block/cpu/update_microcode.c | 2 |
3 files changed, 2 insertions, 3 deletions
diff --git a/src/cpu/amd/pi/00730F01/update_microcode.c b/src/cpu/amd/pi/00730F01/update_microcode.c index ccf64684aa..8942f0146a 100644 --- a/src/cpu/amd/pi/00730F01/update_microcode.c +++ b/src/cpu/amd/pi/00730F01/update_microcode.c @@ -78,7 +78,7 @@ static void apply_microcode_patch(const struct microcode *m) printk(BIOS_DEBUG, "microcode: patch id to apply = 0x%08x\n", m->patch_id); - msr = rdmsr(MSR_PATCH_LEVEL); + msr = rdmsr(IA32_BIOS_SIGN_ID); new_patch_id = msr.lo; if (new_patch_id == m->patch_id) diff --git a/src/include/cpu/amd/msr.h b/src/include/cpu/amd/msr.h index 55a7841e7e..37372d1662 100644 --- a/src/include/cpu/amd/msr.h +++ b/src/include/cpu/amd/msr.h @@ -80,7 +80,6 @@ #define S3_RESUME_EIP_MSR 0xC00110E0 #define PSP_ADDR_MSR 0xc00110a2 -#define MSR_PATCH_LEVEL 0x0000008B #define CORE_PERF_BOOST_CTRL 0x15c #endif /* CPU_AMD_MSR_H */ diff --git a/src/soc/amd/common/block/cpu/update_microcode.c b/src/soc/amd/common/block/cpu/update_microcode.c index 2822d2f355..6d910e7d82 100644 --- a/src/soc/amd/common/block/cpu/update_microcode.c +++ b/src/soc/amd/common/block/cpu/update_microcode.c @@ -49,7 +49,7 @@ static void apply_microcode_patch(const struct microcode *m) printk(BIOS_DEBUG, "microcode: patch id to apply = 0x%08x\n", m->patch_id); - msr = rdmsr(MSR_PATCH_LEVEL); + msr = rdmsr(IA32_BIOS_SIGN_ID); new_patch_id = msr.lo; if (new_patch_id == m->patch_id) |