diff options
| -rw-r--r-- | src/northbridge/intel/sandybridge/romstage_native.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/romstage_native.c b/src/northbridge/intel/sandybridge/romstage_native.c index 657ceb87ad..45f671c6e5 100644 --- a/src/northbridge/intel/sandybridge/romstage_native.c +++ b/src/northbridge/intel/sandybridge/romstage_native.c @@ -32,6 +32,7 @@ #include <device/pci_def.h> #include <device/device.h> #include <halt.h> +#include <tpm.h> #include "raminit_native.h" #include <northbridge/intel/sandybridge/chip.h> #include "southbridge/intel/bd82x6x/pch.h" @@ -129,6 +130,10 @@ void main(unsigned long bist) northbridge_romstage_finalize(s3resume); +#if CONFIG_LPC_TPM + init_tpm(s3resume); +#endif + post_code(0x3f); timestamp_add_now(TS_END_ROMSTAGE); } |