diff options
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/aoac_defs.h | 18 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 12 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 1 |
3 files changed, 19 insertions, 12 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/aoac_defs.h b/src/soc/amd/stoneyridge/include/soc/aoac_defs.h new file mode 100644 index 0000000000..26dbd27999 --- /dev/null +++ b/src/soc/amd/stoneyridge/include/soc/aoac_defs.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef AMD_STONEYRIDGE_AOAC_DEFS_H +#define AMD_STONEYRIDGE_AOAC_DEFS_H + +/* FCH AOAC device offsets for AOAC_DEV_D3_CTL/AOAC_DEV_D3_STATE */ +#define FCH_AOAC_DEV_CLK_GEN 0 +#define FCH_AOAC_DEV_I2C0 5 +#define FCH_AOAC_DEV_I2C1 6 +#define FCH_AOAC_DEV_I2C2 7 +#define FCH_AOAC_DEV_I2C3 8 +#define FCH_AOAC_DEV_UART0 11 +#define FCH_AOAC_DEV_UART1 12 +#define FCH_AOAC_DEV_AMBA 17 +#define FCH_AOAC_DEV_USB2 18 +#define FCH_AOAC_DEV_USB3 23 + +#endif /* AMD_STONEYRIDGE_AOAC_DEFS_H */ diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 80a6c6bc58..224010c24d 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -131,18 +131,6 @@ #define DEBUG_PORT_ENABLE BIT(18) #define DEBUG_PORT_MASK (BIT(16) | BIT(17) | BIT(18)) -/* FCH AOAC device offsets for AOAC_DEV_D3_CTL/AOAC_DEV_D3_STATE */ -#define FCH_AOAC_DEV_CLK_GEN 0 -#define FCH_AOAC_DEV_I2C0 5 -#define FCH_AOAC_DEV_I2C1 6 -#define FCH_AOAC_DEV_I2C2 7 -#define FCH_AOAC_DEV_I2C3 8 -#define FCH_AOAC_DEV_UART0 11 -#define FCH_AOAC_DEV_UART1 12 -#define FCH_AOAC_DEV_AMBA 17 -#define FCH_AOAC_DEV_USB2 18 -#define FCH_AOAC_DEV_USB3 23 - #define PM1_LIMIT 16 #define GPE0_LIMIT 28 #define TOTAL_BITS(a) (8 * sizeof(a)) diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index b7d7b5e486..d9dd78fe13 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -27,6 +27,7 @@ #include <soc/pci_devs.h> #include <agesa_headers.h> #include <soc/acpi.h> +#include <soc/aoac_defs.h> #include <soc/lpc.h> #include <soc/nvs.h> #include <types.h> |