diff options
-rw-r--r-- | src/cpu/intel/model_206ax/acpi.c | 15 | ||||
-rw-r--r-- | src/cpu/intel/model_206ax/chip.h | 3 | ||||
-rw-r--r-- | src/cpu/intel/model_206ax/model_206ax_init.c | 13 | ||||
-rw-r--r-- | src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb | 10 | ||||
-rw-r--r-- | src/mainboard/google/stout/devicetree.cb | 10 | ||||
-rw-r--r-- | src/mainboard/intel/emeraldlake2/devicetree.cb | 13 | ||||
-rw-r--r-- | src/mainboard/kontron/ktqm77/devicetree.cb | 12 | ||||
-rw-r--r-- | src/mainboard/roda/rv11/variants/rv11/devicetree.cb | 14 | ||||
-rw-r--r-- | src/mainboard/roda/rv11/variants/rw11/devicetree.cb | 14 | ||||
-rw-r--r-- | src/mainboard/samsung/stumpy/devicetree.cb | 12 | ||||
-rw-r--r-- | src/northbridge/intel/sandybridge/chipset.cb | 16 | ||||
-rw-r--r-- | src/northbridge/intel/sandybridge/northbridge.c | 2 |
12 files changed, 42 insertions, 92 deletions
diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index 06913bcdc0..d2d6467455 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -95,18 +95,9 @@ static int get_logical_cores_per_package(void) return msr.lo & 0xffff; } -static void generate_C_state_entries(void) +static void generate_C_state_entries(const struct device *dev) { - struct device *lapic; - struct cpu_intel_model_206ax_config *conf = NULL; - - /* Find the SpeedStep CPU in the device tree using magic APIC ID */ - lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC); - if (!lapic) - return; - conf = lapic->chip_info; - if (!conf) - return; + struct cpu_intel_model_206ax_config *conf = dev->bus->dev->chip_info; const int acpi_cstates[3] = { conf->acpi_c1, conf->acpi_c2, conf->acpi_c3 }; @@ -324,7 +315,7 @@ void generate_cpu_entries(const struct device *device) cpuID-1, cores_per_package); /* Generate C-state tables */ - generate_C_state_entries(); + generate_C_state_entries(device); /* Generate T-state tables */ generate_T_state_entries( diff --git a/src/cpu/intel/model_206ax/chip.h b/src/cpu/intel/model_206ax/chip.h index a46c7bf154..13cf3163e0 100644 --- a/src/cpu/intel/model_206ax/chip.h +++ b/src/cpu/intel/model_206ax/chip.h @@ -1,8 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* Magic value used to locate this chip in the device tree */ -#define SPEEDSTEP_APIC_MAGIC 0xACAC - /* Keep this in sync with acpi.c */ enum cpu_acpi_level { CPU_ACPI_DISABLED = 0, diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 8bb1091687..6522e0febb 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -211,18 +211,11 @@ static void configure_c_states(void) wrmsr(MSR_PP1_CURRENT_CONFIG, msr); } -static void configure_thermal_target(void) +static void configure_thermal_target(struct device *dev) { - struct cpu_intel_model_206ax_config *conf; - struct device *lapic; + struct cpu_intel_model_206ax_config *conf = dev->bus->dev->chip_info; msr_t msr; - /* Find pointer to CPU configuration */ - lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC); - if (!lapic || !lapic->chip_info) - return; - conf = lapic->chip_info; - /* Set TCC activation offset if supported */ msr = rdmsr(MSR_PLATFORM_INFO); if ((msr.lo & (1 << 30)) && conf->tcc_offset) { @@ -346,7 +339,7 @@ static void model_206ax_init(struct device *cpu) configure_misc(); /* Thermal throttle activation offset */ - configure_thermal_target(); + configure_thermal_target(cpu); set_aesni_lock(); diff --git a/src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb b/src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb index 8f943782af..62b0b0b391 100644 --- a/src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb +++ b/src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb @@ -1,10 +1,8 @@ chip northbridge/intel/sandybridge - device cpu_cluster 0 on - chip cpu/intel/model_206ax - register "tcc_offset" = "5" # TCC of 95C - device lapic 0 on end - device lapic 0xacac off end - end + chip cpu/intel/model_206ax + device cpu_cluster 0 on end + + register "tcc_offset" = "5" # TCC of 95C end device domain 0 on diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb index 77f58c2cad..87d0ed94c8 100644 --- a/src/mainboard/google/stout/devicetree.cb +++ b/src/mainboard/google/stout/devicetree.cb @@ -19,14 +19,10 @@ chip northbridge/intel/sandybridge register "max_mem_clock_mhz" = "666" - device cpu_cluster 0 on - chip cpu/intel/model_206ax - # Magic APIC ID to locate this chip - device lapic 0 on end - device lapic 0xacac off end + chip cpu/intel/model_206ax + device cpu_cluster 0 on end - register "tcc_offset" = "5" # TCC of 95C - end + register "tcc_offset" = "5" # TCC of 95C end device domain 0 on diff --git a/src/mainboard/intel/emeraldlake2/devicetree.cb b/src/mainboard/intel/emeraldlake2/devicetree.cb index fef8992cd4..2eeb745014 100644 --- a/src/mainboard/intel/emeraldlake2/devicetree.cb +++ b/src/mainboard/intel/emeraldlake2/devicetree.cb @@ -11,15 +11,12 @@ chip northbridge/intel/sandybridge # Enable DVI Hotplug with 6ms pulse register "gpu_dp_b_hotplug" = "0x06" - device cpu_cluster 0 on - chip cpu/intel/model_206ax - # Magic APIC ID to locate this chip - device lapic 0 on end - device lapic 0xacac off end - register "acpi_c1" = "CPU_ACPI_C3" - register "acpi_c2" = "CPU_ACPI_C6" - end + chip cpu/intel/model_206ax + device cpu_cluster 0 on end + + register "acpi_c1" = "CPU_ACPI_C3" + register "acpi_c2" = "CPU_ACPI_C6" end device domain 0 on diff --git a/src/mainboard/kontron/ktqm77/devicetree.cb b/src/mainboard/kontron/ktqm77/devicetree.cb index a72b94f9f5..bf87661bf8 100644 --- a/src/mainboard/kontron/ktqm77/devicetree.cb +++ b/src/mainboard/kontron/ktqm77/devicetree.cb @@ -2,15 +2,11 @@ chip northbridge/intel/sandybridge # IGD Displays register "gfx" = "GMA_STATIC_DISPLAYS(0)" - device cpu_cluster 0 on - chip cpu/intel/model_206ax - # Magic APIC ID to locate this chip - device lapic 0 on end - device lapic 0xacac off end + chip cpu/intel/model_206ax + device cpu_cluster 0 on end - register "acpi_c2" = "CPU_ACPI_C6" - register "acpi_c3" = "CPU_ACPI_DISABLED" - end + register "acpi_c2" = "CPU_ACPI_C6" + register "acpi_c3" = "CPU_ACPI_DISABLED" end device domain 0 on diff --git a/src/mainboard/roda/rv11/variants/rv11/devicetree.cb b/src/mainboard/roda/rv11/variants/rv11/devicetree.cb index 2e5ee0ff9a..44e7372850 100644 --- a/src/mainboard/roda/rv11/variants/rv11/devicetree.cb +++ b/src/mainboard/roda/rv11/variants/rv11/devicetree.cb @@ -17,15 +17,11 @@ chip northbridge/intel/sandybridge register "gpu_cpu_backlight" = "0x0000001a" register "gpu_pch_backlight" = "0x002e0000" - device cpu_cluster 0 on - chip cpu/intel/model_206ax - # Magic APIC ID to locate this chip - device lapic 0 on end - device lapic 0xacac off end - - register "acpi_c2" = "CPU_ACPI_C6" - register "acpi_c3" = "CPU_ACPI_DISABLED" - end + chip cpu/intel/model_206ax + device cpu_cluster 0 on end + + register "acpi_c2" = "CPU_ACPI_C6" + register "acpi_c3" = "CPU_ACPI_DISABLED" end device domain 0 on diff --git a/src/mainboard/roda/rv11/variants/rw11/devicetree.cb b/src/mainboard/roda/rv11/variants/rw11/devicetree.cb index 20b1c9a989..c6aa44c35a 100644 --- a/src/mainboard/roda/rv11/variants/rw11/devicetree.cb +++ b/src/mainboard/roda/rv11/variants/rw11/devicetree.cb @@ -17,15 +17,11 @@ chip northbridge/intel/sandybridge register "gpu_cpu_backlight" = "0x00000ac8" register "gpu_pch_backlight" = "0x13120000" - device cpu_cluster 0 on - chip cpu/intel/model_206ax - # Magic APIC ID to locate this chip - device lapic 0 on end - device lapic 0xacac off end - - register "acpi_c2" = "CPU_ACPI_C6" - register "acpi_c3" = "CPU_ACPI_DISABLED" - end + chip cpu/intel/model_206ax + device cpu_cluster 0 on end + + register "acpi_c2" = "CPU_ACPI_C6" + register "acpi_c3" = "CPU_ACPI_DISABLED" end device domain 0 on diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb index cd7b907d63..10aeb44127 100644 --- a/src/mainboard/samsung/stumpy/devicetree.cb +++ b/src/mainboard/samsung/stumpy/devicetree.cb @@ -11,15 +11,11 @@ chip northbridge/intel/sandybridge register "max_mem_clock_mhz" = "666" - device cpu_cluster 0 on - chip cpu/intel/model_206ax - # Magic APIC ID to locate this chip - device lapic 0 on end - device lapic 0xacac off end + chip cpu/intel/model_206ax + device cpu_cluster 0 on end - register "acpi_c1" = "CPU_ACPI_C3" - register "acpi_c2" = "CPU_ACPI_C6" - end + register "acpi_c1" = "CPU_ACPI_C3" + register "acpi_c2" = "CPU_ACPI_C6" end device domain 0 on diff --git a/src/northbridge/intel/sandybridge/chipset.cb b/src/northbridge/intel/sandybridge/chipset.cb index 16fab6d17a..afa1e5b526 100644 --- a/src/northbridge/intel/sandybridge/chipset.cb +++ b/src/northbridge/intel/sandybridge/chipset.cb @@ -1,19 +1,13 @@ # SPDX-License-Identifier: GPL-2.0-only chip northbridge/intel/sandybridge - device cpu_cluster 0 on - ops sandybridge_cpu_bus_ops - chip cpu/intel/model_206ax - # Magic APIC ID to locate this chip - device lapic 0 on end - device lapic 0xacac off end + chip cpu/intel/model_206ax + device cpu_cluster 0 on ops sandybridge_cpu_bus_ops end - register "acpi_c1" = "CPU_ACPI_C1" - register "acpi_c2" = "CPU_ACPI_C3" - register "acpi_c3" = "CPU_ACPI_C7" - end + register "acpi_c1" = "CPU_ACPI_C1" + register "acpi_c2" = "CPU_ACPI_C3" + register "acpi_c3" = "CPU_ACPI_C7" end - device domain 0 on ops sandybridge_pci_domain_ops end diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index ad85d68cdc..ee4ddc5894 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -387,7 +387,6 @@ static void set_above_4g_pci(const struct device *dev) static void mc_gen_ssdt(const struct device *dev) { - generate_cpu_entries(dev); set_above_4g_pci(dev); } @@ -416,6 +415,7 @@ struct device_operations sandybridge_cpu_bus_ops = { .read_resources = noop_read_resources, .set_resources = noop_set_resources, .init = mp_cpu_bus_init, + .acpi_fill_ssdt = generate_cpu_entries, }; struct chip_operations northbridge_intel_sandybridge_ops = { |