diff options
| -rw-r--r-- | src/ec/google/chromeec/acpi/battery.asl | 2 | ||||
| -rw-r--r-- | src/ec/google/chromeec/acpi/ec.asl | 2 | ||||
| -rw-r--r-- | src/ec/quanta/it8518/acpi/ec.asl | 2 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/acpi/gpio.asl | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/src/ec/google/chromeec/acpi/battery.asl b/src/ec/google/chromeec/acpi/battery.asl index 5e881e54c8..013a5e7c7b 100644 --- a/src/ec/google/chromeec/acpi/battery.asl +++ b/src/ec/google/chromeec/acpi/battery.asl @@ -44,7 +44,7 @@ Method (BSTA, 1, Serialized) Return (Zero) } - If (Not(BTSW (Arg0)) & BTEX) { + If (~BTSW (Arg0) & BTEX) { Local0 = 0x1F } Else { Local0 = 0x0F diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl index ce81880051..af594683c7 100644 --- a/src/ec/google/chromeec/acpi/ec.asl +++ b/src/ec/google/chromeec/acpi/ec.asl @@ -630,7 +630,7 @@ Device (EC0) */ Method (UPPC, 1, Serialized) { - USPP &= Not (1 << Arg0) + USPP &= ~(1 << Arg0) } #endif diff --git a/src/ec/quanta/it8518/acpi/ec.asl b/src/ec/quanta/it8518/acpi/ec.asl index 38c579899f..b05b3c7ad0 100644 --- a/src/ec/quanta/it8518/acpi/ec.asl +++ b/src/ec/quanta/it8518/acpi/ec.asl @@ -547,7 +547,7 @@ Device (EC0) \PWRS = ACPW // Initialize LID switch state - \LIDS = NOT(HPLD) + \LIDS = ~HPLD // Enable OS control of fan speed // TODO FCOS = One diff --git a/src/soc/intel/cannonlake/acpi/gpio.asl b/src/soc/intel/cannonlake/acpi/gpio.asl index 5ae7f74668..7c76962d98 100644 --- a/src/soc/intel/cannonlake/acpi/gpio.asl +++ b/src/soc/intel/cannonlake/acpi/gpio.asl @@ -138,7 +138,7 @@ Method (CGPM, 2, Serialized) Local0 = GPID (Arg0) If (Local0 != 0) { /* Mask off current PM bits */ - PCRA (Local0, GPIO_MISCCFG, Not (MISCCFG_GPIO_PM_CONFIG_BITS)) + PCRA (Local0, GPIO_MISCCFG, ~MISCCFG_GPIO_PM_CONFIG_BITS) /* Mask in requested bits */ PCRO (Local0, GPIO_MISCCFG, Arg1 & MISCCFG_GPIO_PM_CONFIG_BITS) } |