diff options
| -rw-r--r-- | src/soc/intel/cannonlake/chip.h | 9 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/romstage/romstage.c | 2 |
2 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 0cfa3c3eab..dbe211da35 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -212,6 +212,15 @@ struct soc_intel_cannonlake_config { */ uint32_t PrmrrSize; uint8_t PmTimerDisabled; + /* Desired platform debug type. */ + enum { + DebugConsent_Disabled, + DebugConsent_DCI_DBC, + DebugConsent_DCI, + DebugConsent_USB3_DBC, + DebugConsent_XDP, /* XDP/Mipi60 */ + DebugConsent_USB2_DBC, + } DebugConsent; /* * SerialIO device mode selection: * diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 1775cae779..eb72a25ea0 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -101,6 +101,8 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) /* Enable SMBus controller based on config */ m_cfg->SmbusEnable = config->SmbusEnable; + /* Set debug probe type */ + m_cfg->PlatformDebugConsent = config->DebugConsent; mainboard_memory_init_params(mupd); } |