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-rw-r--r--src/mainboard/apple/macbook21/devicetree.cb4
-rw-r--r--src/mainboard/asus/p5gc-mx/devicetree.cb2
-rw-r--r--src/mainboard/getac/p470/devicetree.cb2
-rw-r--r--src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb2
-rw-r--r--src/mainboard/ibase/mb899/devicetree.cb2
-rw-r--r--src/mainboard/intel/d945gclf/devicetree.cb2
-rw-r--r--src/mainboard/kontron/986lcd-m/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/t60/devicetree.cb6
-rw-r--r--src/mainboard/lenovo/x60/devicetree.cb6
-rw-r--r--src/mainboard/roda/rk886ex/devicetree.cb2
-rw-r--r--src/southbridge/intel/i82801gx/chip.h6
11 files changed, 18 insertions, 18 deletions
diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb
index dd701da7ed..fd86e939b9 100644
--- a/src/mainboard/apple/macbook21/devicetree.cb
+++ b/src/mainboard/apple/macbook21/devicetree.cb
@@ -52,10 +52,10 @@ chip northbridge/intel/i945
register "ide_enable_primary" = "true"
register "ide_enable_secondary" = "true"
- register "c4onc3_enable" = "1"
+ register "c4onc3_enable" = "true"
register "c3_latency" = "0x23"
- register "p_cnt_throttling_supported" = "1"
+ register "p_cnt_throttling_supported" = "true"
register "gen1_dec" = "0x000c0681"
register "gen2_dec" = "0x000c1641"
diff --git a/src/mainboard/asus/p5gc-mx/devicetree.cb b/src/mainboard/asus/p5gc-mx/devicetree.cb
index f6d5f76ebb..c464222a76 100644
--- a/src/mainboard/asus/p5gc-mx/devicetree.cb
+++ b/src/mainboard/asus/p5gc-mx/devicetree.cb
@@ -33,7 +33,7 @@ chip northbridge/intel/i945
register "ide_enable_primary" = "true"
register "ide_enable_secondary" = "false"
- register "p_cnt_throttling_supported" = "0"
+ register "p_cnt_throttling_supported" = "false"
# SuperIO Power Management Events
register "gen1_dec" = "0x00040291"
diff --git a/src/mainboard/getac/p470/devicetree.cb b/src/mainboard/getac/p470/devicetree.cb
index b12335e947..86bae671d7 100644
--- a/src/mainboard/getac/p470/devicetree.cb
+++ b/src/mainboard/getac/p470/devicetree.cb
@@ -43,7 +43,7 @@ chip northbridge/intel/i945
register "c3_latency" = "85"
register "docking_supported" = "1"
- register "p_cnt_throttling_supported" = "1"
+ register "p_cnt_throttling_supported" = "true"
register "gen1_dec" = "0x001c02e1"
register "gen2_dec" = "0x00fc0601"
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb
index 576be34973..0aa91b24ec 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb
@@ -58,7 +58,7 @@ chip northbridge/intel/i945
register "ide_enable_secondary" = "false"
register "c3_latency" = "85"
- register "p_cnt_throttling_supported" = "0"
+ register "p_cnt_throttling_supported" = "false"
register "gen1_dec" = "0x000c0801" # ???
register "gen2_dec" = "0x00040291" # Environment Controller
diff --git a/src/mainboard/ibase/mb899/devicetree.cb b/src/mainboard/ibase/mb899/devicetree.cb
index 611bd96dad..93f36404f0 100644
--- a/src/mainboard/ibase/mb899/devicetree.cb
+++ b/src/mainboard/ibase/mb899/devicetree.cb
@@ -33,7 +33,7 @@ chip northbridge/intel/i945
register "ide_enable_secondary" = "false"
register "c3_latency" = "85"
- register "p_cnt_throttling_supported" = "0"
+ register "p_cnt_throttling_supported" = "false"
register "gen1_dec" = "0x00fc0291"
register "gen4_dec" = "0x00000301"
diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb
index 4007e7ecc4..70a3819c4b 100644
--- a/src/mainboard/intel/d945gclf/devicetree.cb
+++ b/src/mainboard/intel/d945gclf/devicetree.cb
@@ -34,7 +34,7 @@ chip northbridge/intel/i945
register "ide_enable_primary" = "true"
register "ide_enable_secondary" = "false"
register "c3_latency" = "85"
- register "p_cnt_throttling_supported" = "0"
+ register "p_cnt_throttling_supported" = "false"
register "gen1_dec" = "0x0007c0681" # SuperIO Power Management
diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb
index cd67480aa6..5e392e681b 100644
--- a/src/mainboard/kontron/986lcd-m/devicetree.cb
+++ b/src/mainboard/kontron/986lcd-m/devicetree.cb
@@ -33,7 +33,7 @@ chip northbridge/intel/i945
register "ide_enable_primary" = "true"
register "ide_enable_secondary" = "true"
register "c3_latency" = "85"
- register "p_cnt_throttling_supported" = "0"
+ register "p_cnt_throttling_supported" = "false"
# ICH-7 generic decode IO ports range for LPC
register "gen1_dec" = "0x00fc0a01" # HWM
diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb
index 913b732395..f72b2e90cd 100644
--- a/src/mainboard/lenovo/t60/devicetree.cb
+++ b/src/mainboard/lenovo/t60/devicetree.cb
@@ -58,10 +58,10 @@ chip northbridge/intel/i945
register "gpe0_en" = "0x11000006"
register "alt_gp_smi_en" = "0x1000"
- register "c4onc3_enable" = "1"
+ register "c4onc3_enable" = "true"
register "c3_latency" = "0x23"
- register "docking_supported" = "1"
- register "p_cnt_throttling_supported" = "1"
+ register "docking_supported" = "true"
+ register "p_cnt_throttling_supported" = "true"
register "gen1_dec" = "0x007c1601"
register "gen2_dec" = "0x000c15e1"
diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb
index d7c86a5282..f63acf7325 100644
--- a/src/mainboard/lenovo/x60/devicetree.cb
+++ b/src/mainboard/lenovo/x60/devicetree.cb
@@ -51,11 +51,11 @@ chip northbridge/intel/i945
register "gpe0_en" = "0x11000006"
register "alt_gp_smi_en" = "0x1000"
- register "c4onc3_enable" = "1"
+ register "c4onc3_enable" = "true"
register "c3_latency" = "0x23"
- register "docking_supported" = "1"
- register "p_cnt_throttling_supported" = "1"
+ register "docking_supported" = "true"
+ register "p_cnt_throttling_supported" = "true"
register "gen1_dec" = "0x007c1601"
register "gen2_dec" = "0x000c15e1"
diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb
index a3b00c1db7..52c96dee33 100644
--- a/src/mainboard/roda/rk886ex/devicetree.cb
+++ b/src/mainboard/roda/rk886ex/devicetree.cb
@@ -38,7 +38,7 @@ chip northbridge/intel/i945
register "c3_latency" = "0x23"
register "docking_supported" = "1"
- register "p_cnt_throttling_supported" = "1"
+ register "p_cnt_throttling_supported" = "true"
register "sata_mode" = "SATA_MODE_IDE_LEGACY_COMBINED"
register "ide_enable_primary" = "true"
diff --git a/src/southbridge/intel/i82801gx/chip.h b/src/southbridge/intel/i82801gx/chip.h
index ba8dd6f438..04b82d321b 100644
--- a/src/southbridge/intel/i82801gx/chip.h
+++ b/src/southbridge/intel/i82801gx/chip.h
@@ -63,9 +63,9 @@ struct southbridge_intel_i82801gx_config {
/* Enable linear PCIe Root Port function numbers starting at zero */
bool pcie_port_coalesce;
- int c4onc3_enable:1;
- int docking_supported:1;
- int p_cnt_throttling_supported:1;
+ bool c4onc3_enable;
+ bool docking_supported;
+ bool p_cnt_throttling_supported;
int c3_latency;
/* Additional LPC IO decode ranges */