diff options
| -rw-r--r-- | src/cpu/amd/pi/00630F01/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/amd/pi/00630F01/fixme.c | 7 | ||||
| -rw-r--r-- | src/cpu/amd/pi/00660F01/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/amd/pi/00660F01/fixme.c | 7 | ||||
| -rw-r--r-- | src/cpu/amd/pi/00670F00/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/amd/pi/00670F00/fixme.c | 7 | ||||
| -rw-r--r-- | src/cpu/amd/pi/00730F01/Kconfig | 1 | ||||
| -rw-r--r-- | src/cpu/amd/pi/00730F01/fixme.c | 7 |
8 files changed, 0 insertions, 32 deletions
diff --git a/src/cpu/amd/pi/00630F01/Kconfig b/src/cpu/amd/pi/00630F01/Kconfig index 5b61a82bbb..5c12ab6b78 100644 --- a/src/cpu/amd/pi/00630F01/Kconfig +++ b/src/cpu/amd/pi/00630F01/Kconfig @@ -15,7 +15,6 @@ config CPU_AMD_PI_00630F01 bool - select PCI_IO_CFG_EXT select MMCONF_SUPPORT_DEFAULT select X86_AMD_FIXED_MTRRS diff --git a/src/cpu/amd/pi/00630F01/fixme.c b/src/cpu/amd/pi/00630F01/fixme.c index d85f394c75..fcdc9254d9 100644 --- a/src/cpu/amd/pi/00630F01/fixme.c +++ b/src/cpu/amd/pi/00630F01/fixme.c @@ -72,13 +72,6 @@ void amd_initmmio(void) MsrReg = CONFIG_MMCONF_BASE_ADDRESS | (LibAmdBitScanReverse (CONFIG_MMCONF_BUS_NUMBER) << 2) | 1; LibAmdMsrWrite (0xC0010058, &MsrReg, &StdHeader); - /* - Set the NB_CFG MSR register. Enable CF8 extended configuration cycles. - */ - LibAmdMsrRead (0xC001001F, &MsrReg, &StdHeader); - MsrReg = MsrReg | 0x0000400000000000; - LibAmdMsrWrite (0xC001001F, &MsrReg, &StdHeader); - /* Set ROM cache onto WP to decrease post time */ MsrReg = (0x0100000000ull - CACHE_ROM_SIZE) | 5ull; LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader); diff --git a/src/cpu/amd/pi/00660F01/Kconfig b/src/cpu/amd/pi/00660F01/Kconfig index a556eccebb..b38ea6ce76 100644 --- a/src/cpu/amd/pi/00660F01/Kconfig +++ b/src/cpu/amd/pi/00660F01/Kconfig @@ -15,7 +15,6 @@ config CPU_AMD_PI_00660F01 bool - select PCI_IO_CFG_EXT select MMCONF_SUPPORT_DEFAULT select X86_AMD_FIXED_MTRRS diff --git a/src/cpu/amd/pi/00660F01/fixme.c b/src/cpu/amd/pi/00660F01/fixme.c index 9a38bd81ac..6770287bca 100644 --- a/src/cpu/amd/pi/00660F01/fixme.c +++ b/src/cpu/amd/pi/00660F01/fixme.c @@ -74,13 +74,6 @@ void amd_initmmio(void) MsrReg = CONFIG_MMCONF_BASE_ADDRESS | (LibAmdBitScanReverse (CONFIG_MMCONF_BUS_NUMBER) << 2) | 1; LibAmdMsrWrite (0xC0010058, &MsrReg, &StdHeader); - /* - Set the NB_CFG MSR register. Enable CF8 extended configuration cycles. - */ - LibAmdMsrRead (0xC001001F, &MsrReg, &StdHeader); - MsrReg = MsrReg | 0x0000400000000000; - LibAmdMsrWrite (0xC001001F, &MsrReg, &StdHeader); - /* For serial port */ PciData = 0xFF03FFD5; PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x14, 0x3, 0x44); diff --git a/src/cpu/amd/pi/00670F00/Kconfig b/src/cpu/amd/pi/00670F00/Kconfig index 132d7e8aec..e47dfa3f53 100644 --- a/src/cpu/amd/pi/00670F00/Kconfig +++ b/src/cpu/amd/pi/00670F00/Kconfig @@ -15,7 +15,6 @@ config CPU_AMD_PI_00670F00 bool - select PCI_IO_CFG_EXT select MMCONF_SUPPORT_DEFAULT select X86_AMD_FIXED_MTRRS diff --git a/src/cpu/amd/pi/00670F00/fixme.c b/src/cpu/amd/pi/00670F00/fixme.c index f892af87c9..86f5acf58a 100644 --- a/src/cpu/amd/pi/00670F00/fixme.c +++ b/src/cpu/amd/pi/00670F00/fixme.c @@ -77,13 +77,6 @@ void amd_initmmio(void) (LibAmdBitScanReverse (CONFIG_MMCONF_BUS_NUMBER) << 2) | 1; LibAmdMsrWrite(0xC0010058, &MsrReg, &StdHeader); - /* - Set the NB_CFG MSR register. Enable CF8 extended config cycles. - */ - LibAmdMsrRead(0xC001001F, &MsrReg, &StdHeader); - MsrReg = MsrReg | 0x0000400000000000; - LibAmdMsrWrite(0xC001001F, &MsrReg, &StdHeader); - /* For serial port */ PciData = 0xFF03FFD5; PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x14, 0x3, 0x44); diff --git a/src/cpu/amd/pi/00730F01/Kconfig b/src/cpu/amd/pi/00730F01/Kconfig index baf7549869..83af181ea0 100644 --- a/src/cpu/amd/pi/00730F01/Kconfig +++ b/src/cpu/amd/pi/00730F01/Kconfig @@ -15,7 +15,6 @@ config CPU_AMD_PI_00730F01 bool - select PCI_IO_CFG_EXT select MMCONF_SUPPORT_DEFAULT select X86_AMD_FIXED_MTRRS diff --git a/src/cpu/amd/pi/00730F01/fixme.c b/src/cpu/amd/pi/00730F01/fixme.c index e16a4c4339..fcdf49815f 100644 --- a/src/cpu/amd/pi/00730F01/fixme.c +++ b/src/cpu/amd/pi/00730F01/fixme.c @@ -74,13 +74,6 @@ void amd_initmmio(void) MsrReg = CONFIG_MMCONF_BASE_ADDRESS | (LibAmdBitScanReverse (CONFIG_MMCONF_BUS_NUMBER) << 2) | 1; LibAmdMsrWrite (0xC0010058, &MsrReg, &StdHeader); - /* - Set the NB_CFG MSR register. Enable CF8 extended configuration cycles. - */ - LibAmdMsrRead (0xC001001F, &MsrReg, &StdHeader); - MsrReg = MsrReg | 0x0000400000000000; - LibAmdMsrWrite (0xC001001F, &MsrReg, &StdHeader); - /* For serial port */ PciData = 0xFF03FFD5; PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x14, 0x3, 0x44); |