diff options
| -rw-r--r-- | src/soc/intel/braswell/memmap.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/braswell/northcluster.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/common/Kconfig | 12 | ||||
| -rw-r--r-- | src/soc/intel/common/raminit.c | 5 | ||||
| -rw-r--r-- | src/soc/intel/skylake/memmap.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/systemagent.c | 3 |
6 files changed, 2 insertions, 24 deletions
diff --git a/src/soc/intel/braswell/memmap.c b/src/soc/intel/braswell/memmap.c index 28156a360d..d1d784d73b 100644 --- a/src/soc/intel/braswell/memmap.c +++ b/src/soc/intel/braswell/memmap.c @@ -81,5 +81,5 @@ void *cbmem_top(void) */ smm_region((void **)&smm_base, &smm_size); - return (void *)(smm_base - CONFIG_CHIPSET_RESERVED_MEM_BYTES); + return (void *)smm_base; } diff --git a/src/soc/intel/braswell/northcluster.c b/src/soc/intel/braswell/northcluster.c index d5d7268a8f..7821a2a1ca 100644 --- a/src/soc/intel/braswell/northcluster.c +++ b/src/soc/intel/braswell/northcluster.c @@ -52,8 +52,6 @@ * +--------------------------+ SMMRRH, IRM0 * | TSEG | * +--------------------------+ SMMRRL - * | FSP Reserved Mem | - * +--------------------------+ SMMRRL - CONFIG_CHIPSET_RESERVED_MEM_BYTES * | Usable DRAM | * +--------------------------+ 0 * diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig index 3d0c0eff78..68d3f5ea6c 100644 --- a/src/soc/intel/common/Kconfig +++ b/src/soc/intel/common/Kconfig @@ -36,18 +36,6 @@ endif # CACHE_MRC_SETTINGS endif # HAVE_MRC -config CHIPSET_RESERVED_MEM_BYTES - hex "Size in bytes of chipset reserved memory area" - default 0 - help - If insufficient documentation is available to determine the size of - the chipset reserved memory area by walking the chipset registers, - the CHIPSET_RESERVED_MEM_BYTES may be used as a workaround to account - for the missing pieces of memory. The value specified in bytes is: - - value = TSEG base - top of low usable memory - (any sizes determined - by reading chipset registers) - config DISPLAY_MTRRS bool "MTRRs: Display the MTRR settings" default n diff --git a/src/soc/intel/common/raminit.c b/src/soc/intel/common/raminit.c index 0e764cd18b..69ae1146a4 100644 --- a/src/soc/intel/common/raminit.c +++ b/src/soc/intel/common/raminit.c @@ -153,8 +153,6 @@ void raminit(struct romstage_params *params) #endif /* Migrate CAR data */ - printk(BIOS_DEBUG, "0x%08x: CONFIG_CHIPSET_RESERVED_MEM_BYTES\n", - CONFIG_CHIPSET_RESERVED_MEM_BYTES); printk(BIOS_DEBUG, "0x%p: cbmem_top\n", cbmem_top()); if (pei_ptr->boot_mode != SLEEP_STATE_S3) { cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, @@ -268,9 +266,6 @@ void raminit(struct romstage_params *params) - cbmem_root->PhysicalStart - cbmem_root->ResourceLength; printk(BIOS_DEBUG, - "0x%08x: CONFIG_CHIPSET_RESERVED_MEM_BYTES\n", - CONFIG_CHIPSET_RESERVED_MEM_BYTES); - printk(BIOS_DEBUG, "0x%08x: Chipset reserved bytes reported by FSP\n", (unsigned int)delta_bytes); die("Please verify the chipset reserved size\n"); diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c index f8ef01a6df..bba93cb2a1 100644 --- a/src/soc/intel/skylake/memmap.c +++ b/src/soc/intel/skylake/memmap.c @@ -96,6 +96,6 @@ void *cbmem_top(void) top_of_ram = ALIGN_DOWN(top_of_ram, mmap_region_granluarity()); } - return (void *)(top_of_ram - CONFIG_CHIPSET_RESERVED_MEM_BYTES); + return (void *)top_of_ram; } diff --git a/src/soc/intel/skylake/systemagent.c b/src/soc/intel/skylake/systemagent.c index 2034e8e1f1..a1bcfdcf71 100644 --- a/src/soc/intel/skylake/systemagent.c +++ b/src/soc/intel/skylake/systemagent.c @@ -351,15 +351,12 @@ static void mc_add_dram_resources(device_t dev) base_k = 0xc0000 >> 10; size_k = (unsigned long)(mc_values[TSEG_REG] >> 10) - base_k; size_k -= dpr_size >> 10; - size_k -= CONFIG_CHIPSET_RESERVED_MEM_BYTES >> 10; ram_resource(dev, index++, base_k, size_k); /* TSEG - DPR -> BGSM */ resource = new_resource(dev, index++); resource->base = mc_values[TSEG_REG] - dpr_size; resource->size = mc_values[BGSM_REG] - resource->base; - resource->base -= CONFIG_CHIPSET_RESERVED_MEM_BYTES; - resource->size += CONFIG_CHIPSET_RESERVED_MEM_BYTES; resource->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_RESERVE | IORESOURCE_ASSIGNED | IORESOURCE_CACHEABLE; |