diff options
| -rw-r--r-- | src/cpu/x86/mtrr/earlymtrr.c | 6 | ||||
| -rw-r--r-- | src/northbridge/intel/e7520/raminit.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/e7525/raminit.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/i3100/raminit.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/i3100/raminit_ep80579.c | 2 |
5 files changed, 7 insertions, 7 deletions
diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index 7a1f51de15..593f0664d7 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -21,11 +21,11 @@ static void set_var_mtrr( } #if !defined(CONFIG_CACHE_AS_RAM) || !CONFIG_CACHE_AS_RAM -static void cache_lbmem(int type) +static void cache_ramstage(void) { - /* Enable caching for 0 - 1MB using variable mtrr */ + /* Enable caching for lower 1MB and ram stage using variable mtrr */ disable_cache(); - set_var_mtrr(0, 0x00000000, CONFIG_RAMTOP, type); + set_var_mtrr(0, 0x00000000, CONFIG_RAMTOP, MTRR_TYPE_WRBACK); enable_cache(); } diff --git a/src/northbridge/intel/e7520/raminit.c b/src/northbridge/intel/e7520/raminit.c index d226085d0d..191c077803 100644 --- a/src/northbridge/intel/e7520/raminit.c +++ b/src/northbridge/intel/e7520/raminit.c @@ -1334,5 +1334,5 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl) pci_write_config16(PCI_DEV(0, 0x00, 0), MCHSCRB, data16); /* The memory is now setup, use it */ - cache_lbmem(MTRR_TYPE_WRBACK); + cache_ramstage(); } diff --git a/src/northbridge/intel/e7525/raminit.c b/src/northbridge/intel/e7525/raminit.c index b5895bc647..c491a7ed2d 100644 --- a/src/northbridge/intel/e7525/raminit.c +++ b/src/northbridge/intel/e7525/raminit.c @@ -1307,5 +1307,5 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl) pci_write_config16(ctrl->f0, MCHSCRB, data16); /* The memory is now setup, use it */ - cache_lbmem(MTRR_TYPE_WRBACK); + cache_ramstage(); } diff --git a/src/northbridge/intel/i3100/raminit.c b/src/northbridge/intel/i3100/raminit.c index 050df951e5..b453e8ba87 100644 --- a/src/northbridge/intel/i3100/raminit.c +++ b/src/northbridge/intel/i3100/raminit.c @@ -1198,6 +1198,6 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl) /* The memory is now setup, use it */ #if !CONFIG_CACHE_AS_RAM - cache_lbmem(MTRR_TYPE_WRBACK); + cache_ramstage(); #endif } diff --git a/src/northbridge/intel/i3100/raminit_ep80579.c b/src/northbridge/intel/i3100/raminit_ep80579.c index 79fc5f72e2..5fe206ff2a 100644 --- a/src/northbridge/intel/i3100/raminit_ep80579.c +++ b/src/northbridge/intel/i3100/raminit_ep80579.c @@ -772,7 +772,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl) pci_write_config32(ctrl->f0, DRC, drc); /* The memory is now set up--use it */ - cache_lbmem(MTRR_TYPE_WRBACK); + cache_ramstage(); } static inline int memory_initialized(void) |