diff options
| -rw-r--r-- | src/arch/arm/include/armv4/arch/exception.h | 2 | ||||
| -rw-r--r-- | src/arch/x86/include/arch/exception.h | 2 | ||||
| -rw-r--r-- | src/soc/rockchip/rk3288/include/soc/memlayout.ld | 9 | ||||
| -rw-r--r-- | src/vendorcode/google/chromeos/vboot2/verstage.c | 14 |
4 files changed, 17 insertions, 10 deletions
diff --git a/src/arch/arm/include/armv4/arch/exception.h b/src/arch/arm/include/armv4/arch/exception.h index a426c52aca..d4e9658f75 100644 --- a/src/arch/arm/include/armv4/arch/exception.h +++ b/src/arch/arm/include/armv4/arch/exception.h @@ -30,6 +30,6 @@ #ifndef _ARCH_EXCEPTION_H #define _ARCH_EXCEPTION_H -static void exception_init(void) { /* not implemented */ } +static inline void exception_init(void) { /* not implemented */ } #endif diff --git a/src/arch/x86/include/arch/exception.h b/src/arch/x86/include/arch/exception.h index a426c52aca..d4e9658f75 100644 --- a/src/arch/x86/include/arch/exception.h +++ b/src/arch/x86/include/arch/exception.h @@ -30,6 +30,6 @@ #ifndef _ARCH_EXCEPTION_H #define _ARCH_EXCEPTION_H -static void exception_init(void) { /* not implemented */ } +static inline void exception_init(void) { /* not implemented */ } #endif diff --git a/src/soc/rockchip/rk3288/include/soc/memlayout.ld b/src/soc/rockchip/rk3288/include/soc/memlayout.ld index 922e2f8784..e5c44a00eb 100644 --- a/src/soc/rockchip/rk3288/include/soc/memlayout.ld +++ b/src/soc/rockchip/rk3288/include/soc/memlayout.ld @@ -35,15 +35,16 @@ SECTIONS SRAM_START(0xFF700000) TTB(0xFF700000, 16K) BOOTBLOCK(0xFF704004, 15K - 4) - TTB_SUBTABLES(0xFF707c00, 1K) - VBOOT2_WORK(0xFF708000, 16K) + TTB_SUBTABLES(0xFF707C00, 1K) + PRERAM_CBMEM_CONSOLE(0xFF708000, 4K) + VBOOT2_WORK(0xFF709000, 12K) OVERLAP_VERSTAGE_ROMSTAGE(0xFF70C000, 40K) PRERAM_CBFS_CACHE(0xFF716000, 4K) STACK(0xFF717000, 4K) SRAM_END(0xFF718000) - /* 4K of special SRAM in PMU power domain. Careful: only supports 32-bit - * wide write accesses! Only use with MMU and writeback mapping. */ + /* 4K of special SRAM in PMU power domain. + * Careful: only supports 32-bit wide write accesses! */ SYMBOL(pmu_sram, 0xFF720000) SYMBOL(epmu_sram, 0xFF721000) } diff --git a/src/vendorcode/google/chromeos/vboot2/verstage.c b/src/vendorcode/google/chromeos/vboot2/verstage.c index 88c18f6de3..289b93fefc 100644 --- a/src/vendorcode/google/chromeos/vboot2/verstage.c +++ b/src/vendorcode/google/chromeos/vboot2/verstage.c @@ -18,6 +18,7 @@ */ #include <antirollback.h> +#include <arch/exception.h> #include <console/console.h> #include <console/vtxprintf.h> #include <string.h> @@ -166,11 +167,7 @@ static void save_if_needed(struct vb2_context *ctx) * TODO: Avoid loading a stage twice (once in hash_body & again in load_stage). * when per-stage verification is ready. */ -#if CONFIG_RETURN_FROM_VERSTAGE -void main(void) -#else void verstage_main(void) -#endif /* CONFIG_RETURN_FROM_VERSTAGE */ { struct vb2_context ctx; struct vboot_region fw_main; @@ -249,3 +246,12 @@ void verstage_main(void) printk(BIOS_INFO, "Slot %c is selected\n", is_slot_a(&ctx) ? 'A' : 'B'); vb2_set_selected_region(wd, &fw_main); } + +#if IS_ENABLED(CONFIG_RETURN_FROM_VERSTAGE) +void main(void) +{ + console_init(); + exception_init(); + verstage_main(); +} +#endif |