diff options
| -rw-r--r-- | src/lib/coreboot_table.c | 7 | ||||
| -rw-r--r-- | src/mainboard/google/butterfly/early_init.c | 3 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/romstage/raminit.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/romstage/romstage.c | 3 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/acpi.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/cpu/acpi.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pch/acpi.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/raminit.c | 5 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/me.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/me_8.x.c | 4 |
10 files changed, 0 insertions, 34 deletions
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 9e0d589250..d6fd84ae99 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -27,13 +27,6 @@ #if CONFIG(USE_OPTION_TABLE) #include <option_table.h> #endif -#if CONFIG(CHROMEOS) -#if CONFIG(HAVE_ACPI_TABLES) -#include <acpi/acpi.h> -#endif -#include <vendorcode/google/chromeos/chromeos.h> -#include <vendorcode/google/chromeos/gnvs.h> -#endif #if CONFIG(PLATFORM_USES_FSP2_0) #include <fsp/util.h> #else diff --git a/src/mainboard/google/butterfly/early_init.c b/src/mainboard/google/butterfly/early_init.c index 2ffa3aa5e9..c439fe2e73 100644 --- a/src/mainboard/google/butterfly/early_init.c +++ b/src/mainboard/google/butterfly/early_init.c @@ -7,9 +7,6 @@ #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> -#if CONFIG(CHROMEOS) -#include <vendorcode/google/chromeos/chromeos.h> -#endif void mainboard_late_rcba_config(void) { diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c index 10ad93298b..f922750a36 100644 --- a/src/soc/intel/baytrail/romstage/raminit.c +++ b/src/soc/intel/baytrail/romstage/raminit.c @@ -17,8 +17,6 @@ #include <soc/iosf.h> #include <soc/pci_devs.h> #include <soc/romstage.h> -#include <ec/google/chromeec/ec.h> -#include <ec/google/chromeec/ec_commands.h> #include <security/vboot/vboot_common.h> uintptr_t smbus_base(void) diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index 76aa711fc8..b0d380cb6f 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -6,9 +6,6 @@ #include <device/pci_ops.h> #include <console/console.h> #include <cbmem.h> -#if CONFIG(EC_GOOGLE_CHROMEEC) -#include <ec/google/chromeec/ec.h> -#endif #include <elog.h> #include <romstage_handoff.h> #include <string.h> diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index 9b5ac9ef7e..dbaade6945 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -14,8 +14,6 @@ #include <arch/cpu.h> #include <cpu/x86/msr.h> #include <cpu/intel/turbo.h> -#include <ec/google/chromeec/ec.h> -#include <vendorcode/google/chromeos/gnvs.h> #include <soc/acpi.h> #include <soc/cpu.h> #include <soc/iomap.h> diff --git a/src/soc/intel/broadwell/cpu/acpi.c b/src/soc/intel/broadwell/cpu/acpi.c index ec3d588a44..23f674b493 100644 --- a/src/soc/intel/broadwell/cpu/acpi.c +++ b/src/soc/intel/broadwell/cpu/acpi.c @@ -14,8 +14,6 @@ #include <arch/cpu.h> #include <cpu/x86/msr.h> #include <cpu/intel/turbo.h> -#include <ec/google/chromeec/ec.h> -#include <vendorcode/google/chromeos/gnvs.h> #include <soc/acpi.h> #include <soc/cpu.h> #include <soc/iomap.h> diff --git a/src/soc/intel/broadwell/pch/acpi.c b/src/soc/intel/broadwell/pch/acpi.c index 712bb46f8a..34f9c04562 100644 --- a/src/soc/intel/broadwell/pch/acpi.c +++ b/src/soc/intel/broadwell/pch/acpi.c @@ -14,8 +14,6 @@ #include <arch/cpu.h> #include <cpu/x86/msr.h> #include <cpu/intel/turbo.h> -#include <ec/google/chromeec/ec.h> -#include <vendorcode/google/chromeos/gnvs.h> #include <soc/acpi.h> #include <soc/cpu.h> #include <soc/iomap.h> diff --git a/src/soc/intel/broadwell/raminit.c b/src/soc/intel/broadwell/raminit.c index 44a89377d4..506c6f6a19 100644 --- a/src/soc/intel/broadwell/raminit.c +++ b/src/soc/intel/broadwell/raminit.c @@ -9,11 +9,6 @@ #include <memory_info.h> #include <mrc_cache.h> #include <string.h> -#if CONFIG(EC_GOOGLE_CHROMEEC) -#include <ec/google/chromeec/ec.h> -#include <ec/google/chromeec/ec_commands.h> -#endif -#include <vendorcode/google/chromeos/chromeos.h> #include <soc/iomap.h> #include <soc/pei_data.h> #include <soc/pei_wrapper.h> diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index 3876b02306..2adfbd5c98 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -23,10 +23,6 @@ #include "me.h" #include "pch.h" -#if CONFIG(CHROMEOS) -#include <vendorcode/google/chromeos/gnvs.h> -#endif - /* Send END OF POST message to the ME */ static int __unused mkhi_end_of_post(void) { diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index d47c1da6b8..b0226a6e9a 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -23,10 +23,6 @@ #include "me.h" #include "pch.h" -#if CONFIG(CHROMEOS) -#include <vendorcode/google/chromeos/gnvs.h> -#endif - /* Send END OF POST message to the ME */ static int __unused mkhi_end_of_post(void) { |