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-rw-r--r--src/cpu/x86/lapic/lapic_cpu_init.c2
-rw-r--r--src/include/cpu/x86/lapic.h17
2 files changed, 4 insertions, 15 deletions
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index e141ad8ec9..bc0f44fd90 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -128,7 +128,7 @@ static int lapic_start_cpu(unsigned long apicid)
printk(BIOS_ERR, "ESR is 0x%x\n", lapic_read(LAPIC_ESR));
if (lapic_read(LAPIC_ESR)) {
printk(BIOS_ERR, "Try to reset ESR\n");
- xapic_write_atomic(LAPIC_ESR, 0);
+ lapic_write(LAPIC_ESR, 0);
printk(BIOS_ERR, "ESR is 0x%x\n",
lapic_read(LAPIC_ESR));
}
diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h
index 4fbae88ca5..05d096e318 100644
--- a/src/include/cpu/x86/lapic.h
+++ b/src/include/cpu/x86/lapic.h
@@ -18,21 +18,10 @@ static __always_inline void xapic_write(unsigned int reg, uint32_t v)
write32((volatile void *)(uintptr_t)(LAPIC_DEFAULT_BASE + reg), v);
}
-static inline void xapic_write_atomic(unsigned long reg, uint32_t v)
-{
- volatile uint32_t *ptr;
-
- ptr = (volatile uint32_t *)(LAPIC_DEFAULT_BASE + reg);
-
- asm volatile ("xchgl %0, %1\n"
- : "+r" (v), "+m" (*(ptr))
- : : "memory", "cc");
-}
-
static __always_inline void xapic_send_ipi(uint32_t icrlow, uint32_t apicid)
{
- xapic_write_atomic(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid));
- xapic_write_atomic(LAPIC_ICR, icrlow);
+ xapic_write(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid));
+ xapic_write(LAPIC_ICR, icrlow);
}
static __always_inline int xapic_busy(void)
@@ -114,7 +103,7 @@ static __always_inline void lapic_update32(unsigned int reg, uint32_t mask, uint
value = xapic_read(reg);
value &= mask;
value |= or;
- xapic_write_atomic(reg, value);
+ xapic_write(reg, value);
}
}