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-rw-r--r--src/soc/intel/common/block/cse/Kconfig6
-rw-r--r--src/soc/intel/common/block/cse/Makefile.inc9
2 files changed, 15 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig
index b6f49c61e8..1cb7d35fb0 100644
--- a/src/soc/intel/common/block/cse/Kconfig
+++ b/src/soc/intel/common/block/cse/Kconfig
@@ -31,3 +31,9 @@ config SOC_INTEL_CSE_RW_CBFS_NAME
default "me_rw"
help
CBFS entry name for Intel CSE CBFS RW blob
+
+config SOC_INTEL_CSE_RW_FILE
+ string "Intel CSE CBFS RW path and filename"
+ default ""
+ help
+ Intel CSE CBFS RW blob path and file name
diff --git a/src/soc/intel/common/block/cse/Makefile.inc b/src/soc/intel/common/block/cse/Makefile.inc
index 30ff66bf6f..11cc3c20d1 100644
--- a/src/soc/intel/common/block/cse/Makefile.inc
+++ b/src/soc/intel/common/block/cse/Makefile.inc
@@ -3,3 +3,12 @@ romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CSE) += cse.c
ramstage-$(CONFIG_SOC_INTEL_CSE_LITE_SKU) += cse_lite.c
smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HECI_DISABLE_IN_SMM) += disable_heci.c
+
+ifneq ($(CONFIG_SOC_INTEL_CSE_RW_FILE),"")
+CSE_LITE_ME_RW = $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME))
+regions-for-file-$(CSE_LITE_ME_RW) = FW_MAIN_A,FW_MAIN_B
+cbfs-files-y += $(CSE_LITE_ME_RW)
+$(CSE_LITE_ME_RW)-file := $(call strip_quotes,$(CONFIG_SOC_INTEL_CSE_RW_FILE))
+$(CSE_LITE_ME_RW)-name := $(CSE_LITE_ME_RW)
+$(CSE_LITE_ME_RW)-type := raw
+endif