diff options
| -rw-r--r-- | src/soc/intel/alderlake/include/soc/pcr_ids.h | 5 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/spi.c | 7 | ||||
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/fast_spi.h | 4 | ||||
| -rw-r--r-- | src/soc/intel/tigerlake/include/soc/pcr_ids.h | 9 | ||||
| -rw-r--r-- | src/soc/intel/tigerlake/spi.c | 10 |
6 files changed, 15 insertions, 24 deletions
diff --git a/src/soc/intel/alderlake/include/soc/pcr_ids.h b/src/soc/intel/alderlake/include/soc/pcr_ids.h index 9ea075a78e..f125ee20cd 100644 --- a/src/soc/intel/alderlake/include/soc/pcr_ids.h +++ b/src/soc/intel/alderlake/include/soc/pcr_ids.h @@ -40,9 +40,4 @@ #define PID_CPU_GPIOCOM4 0xb9 #define PID_CPU_GPIOCOM5 0xba -/* - * SPI - DMI Destination ID - */ -#define SPI_DMI_DESTINATION_ID 0x23a8 - #endif diff --git a/src/soc/intel/alderlake/spi.c b/src/soc/intel/alderlake/spi.c index b02f2a20fd..d1ef6cd570 100644 --- a/src/soc/intel/alderlake/spi.c +++ b/src/soc/intel/alderlake/spi.c @@ -9,7 +9,8 @@ #include <intelblocks/fast_spi.h> #include <intelblocks/spi.h> #include <soc/pci_devs.h> -#include <soc/pcr_ids.h> + +#define PSF_SPI_DESTINATION_ID 0x23a8 int spi_soc_devfn_to_bus(unsigned int devfn) { @@ -28,7 +29,7 @@ int spi_soc_devfn_to_bus(unsigned int devfn) return -1; } -uint32_t soc_get_spi_dmi_destination_id(void) +uint32_t soc_get_spi_psf_destination_id(void) { - return SPI_DMI_DESTINATION_ID; + return PSF_SPI_DESTINATION_ID; } diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 93de2ecb87..0e012316d1 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -325,9 +325,9 @@ static void fast_spi_enable_ext_bios(void) "Only 32MiB windows are supported for extended BIOS!"); #endif - /* Configure DMI Source decode for Extended BIOS Region */ + /* Configure Source decode for Extended BIOS Region */ if (dmi_enable_gpmr(CONFIG_EXT_BIOS_WIN_BASE, CONFIG_EXT_BIOS_WIN_SIZE, - soc_get_spi_dmi_destination_id()) == CB_ERR) + soc_get_spi_psf_destination_id()) == CB_ERR) return; /* Program EXT_BIOS_BAR1 with obtained ext_bios_base */ diff --git a/src/soc/intel/common/block/include/intelblocks/fast_spi.h b/src/soc/intel/common/block/include/intelblocks/fast_spi.h index d5d3cd560c..a903ea839e 100644 --- a/src/soc/intel/common/block/include/intelblocks/fast_spi.h +++ b/src/soc/intel/common/block/include/intelblocks/fast_spi.h @@ -87,9 +87,9 @@ void fast_spi_disable_wp(void); */ void fast_spi_get_ext_bios_window(uintptr_t *base, size_t *size); /* - * SOC function to get SPI-DMI Destination Id + * SOC function to get SPI PSF Destination Id */ -uint32_t soc_get_spi_dmi_destination_id(void); +uint32_t soc_get_spi_psf_destination_id(void); /* * Add MTRR for extended BIOS region(when supported) to postcar frame */ diff --git a/src/soc/intel/tigerlake/include/soc/pcr_ids.h b/src/soc/intel/tigerlake/include/soc/pcr_ids.h index be5f1fb26b..22f08d73d1 100644 --- a/src/soc/intel/tigerlake/include/soc/pcr_ids.h +++ b/src/soc/intel/tigerlake/include/soc/pcr_ids.h @@ -39,13 +39,4 @@ #define PID_CPU_GPIOCOM4 0xb9 #define PID_CPU_GPIOCOM5 0xba -/* - * SPI - DMI Destination ID - */ -#if CONFIG(SOC_INTEL_TIGERLAKE_PCH_H) -#define SPI_DMI_DESTINATION_ID 0x23b0 -#else -#define SPI_DMI_DESTINATION_ID 0x23a8 -#endif - #endif diff --git a/src/soc/intel/tigerlake/spi.c b/src/soc/intel/tigerlake/spi.c index ef86feafbf..697128aaf2 100644 --- a/src/soc/intel/tigerlake/spi.c +++ b/src/soc/intel/tigerlake/spi.c @@ -9,7 +9,9 @@ #include <intelblocks/spi.h> #include <intelblocks/fast_spi.h> #include <soc/pci_devs.h> -#include <soc/pcr_ids.h> + +#define PSF_SPI_DESTINATION_ID_H 0x23b0 +#define PSF_SPI_DESTINATION_ID 0x23a8 int spi_soc_devfn_to_bus(unsigned int devfn) { @@ -26,7 +28,9 @@ int spi_soc_devfn_to_bus(unsigned int devfn) return -1; } -uint32_t soc_get_spi_dmi_destination_id(void) +uint32_t soc_get_spi_psf_destination_id(void) { - return SPI_DMI_DESTINATION_ID; + if (CONFIG(SOC_INTEL_TIGERLAKE_PCH_H)) + return PSF_SPI_DESTINATION_ID_H; + return PSF_SPI_DESTINATION_ID; } |