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-rw-r--r--src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb1
-rw-r--r--src/mainboard/google/brya/variants/nereid/overridetree.cb1
-rw-r--r--src/mainboard/google/brya/variants/nivviks/overridetree.cb4
3 files changed, 4 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
index 91c633a3fa..d85e230e5d 100644
--- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
@@ -25,7 +25,6 @@ chip soc/intel/alderlake
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # USB2_A0
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # USB2_A1
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Camera
- register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Bluetooth
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A port A0
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A port A1
diff --git a/src/mainboard/google/brya/variants/nereid/overridetree.cb b/src/mainboard/google/brya/variants/nereid/overridetree.cb
index add5e213f4..9cb27e88d7 100644
--- a/src/mainboard/google/brya/variants/nereid/overridetree.cb
+++ b/src/mainboard/google/brya/variants/nereid/overridetree.cb
@@ -13,6 +13,7 @@ chip soc/intel/alderlake
register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}"
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WFC
+ register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for PCIe WLAN
device domain 0 on
device ref i2c1 on
diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
index 194b26fa3e..8ccbac7156 100644
--- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb
+++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
@@ -12,6 +12,8 @@ chip soc/intel/alderlake
register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}"
+ register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
+
device domain 0 on
device ref ipu on
chip drivers/intel/mipi_camera
@@ -300,7 +302,7 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_INTERNAL"
register "reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
- device ref usb2_port8 on end
+ device ref usb2_port10 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0 (MLB)""