diff options
| -rw-r--r-- | src/southbridge/intel/bd82x6x/acpi/lpc.asl | 5 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/acpi/lpc.asl | 5 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801ix/acpi/lpc.asl | 5 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/acpi/lpc.asl | 5 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/acpi/lpc.asl | 5 |
5 files changed, 0 insertions, 25 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/lpc.asl b/src/southbridge/intel/bd82x6x/acpi/lpc.asl index 85e8d24490..7dd9623e16 100644 --- a/src/southbridge/intel/bd82x6x/acpi/lpc.asl +++ b/src/southbridge/intel/bd82x6x/acpi/lpc.asl @@ -43,11 +43,6 @@ Device (LPCB) GR13, 2, GR14, 2, GR15, 2, - - Offset (0xf0), // RCBA - RCEN, 1, - , 13, - RCBA, 18, } #include <southbridge/intel/common/acpi/irqlinks.asl> diff --git a/src/southbridge/intel/i82801gx/acpi/lpc.asl b/src/southbridge/intel/i82801gx/acpi/lpc.asl index 1f9e701e84..ab6ffae95d 100644 --- a/src/southbridge/intel/i82801gx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801gx/acpi/lpc.asl @@ -25,11 +25,6 @@ Device (LPCB) Offset (0x80), // IO Decode Ranges IOD0, 8, IOD1, 8, - - Offset (0xf0), // RCBA - RCEN, 1, - , 13, - RCBA, 18, } #include <southbridge/intel/common/acpi/irqlinks.asl> diff --git a/src/southbridge/intel/i82801ix/acpi/lpc.asl b/src/southbridge/intel/i82801ix/acpi/lpc.asl index b93fa96d23..c351c531ad 100644 --- a/src/southbridge/intel/i82801ix/acpi/lpc.asl +++ b/src/southbridge/intel/i82801ix/acpi/lpc.asl @@ -25,11 +25,6 @@ Device (LPCB) Offset (0x80), // IO Decode Ranges IOD0, 8, IOD1, 8, - - Offset (0xf0), // RCBA - RCEN, 1, - , 13, - RCBA, 18, } #include <southbridge/intel/common/acpi/irqlinks.asl> diff --git a/src/southbridge/intel/i82801jx/acpi/lpc.asl b/src/southbridge/intel/i82801jx/acpi/lpc.asl index b93fa96d23..c351c531ad 100644 --- a/src/southbridge/intel/i82801jx/acpi/lpc.asl +++ b/src/southbridge/intel/i82801jx/acpi/lpc.asl @@ -25,11 +25,6 @@ Device (LPCB) Offset (0x80), // IO Decode Ranges IOD0, 8, IOD1, 8, - - Offset (0xf0), // RCBA - RCEN, 1, - , 13, - RCBA, 18, } #include <southbridge/intel/common/acpi/irqlinks.asl> diff --git a/src/southbridge/intel/lynxpoint/acpi/lpc.asl b/src/southbridge/intel/lynxpoint/acpi/lpc.asl index 0e8bad3f72..b95c2f06b1 100644 --- a/src/southbridge/intel/lynxpoint/acpi/lpc.asl +++ b/src/southbridge/intel/lynxpoint/acpi/lpc.asl @@ -29,11 +29,6 @@ Device (LPCB) Offset (0x80), // IO Decode Ranges IOD0, 8, IOD1, 8, - - Offset (0xf0), // RCBA - RCEN, 1, - , 13, - RCBA, 18, } #include <southbridge/intel/common/acpi/irqlinks.asl> |