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-rw-r--r--src/northbridge/intel/sandybridge/raminit.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 01ad3ed9d2..fa71bc10d3 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -2262,7 +2262,17 @@ static void discover_timB(ramctr_timing * ctrl, int channel, int slotrank)
}
FOR_ALL_LANES {
struct run rn = get_longest_zero_run(statistics[lane], 128);
- ctrl->timings[channel][slotrank].lanes[lane].timB = rn.start;
+ if (rn.start < rn.middle) {
+ ctrl->timings[channel][slotrank].lanes[lane].timB = rn.start;
+ } else {
+ /* In this case statistics[lane][7f] and statistics[lane][0] are
+ * both zero.
+ * Prefer a smaller value over rn.start to prevent failures in
+ * the following write tests.
+ */
+ ctrl->timings[channel][slotrank].lanes[lane].timB = 0;
+ }
+
if (rn.all)
die("timB discovery failed");
printram("Bval: %d, %d, %d, %x\n", channel, slotrank,