diff options
| -rw-r--r-- | src/cpu/intel/model_206ax/model_206ax_init.c | 34 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/report_platform.c | 39 |
2 files changed, 27 insertions, 46 deletions
diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 4be3d87aa0..75631c16a6 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -498,9 +498,33 @@ static void intel_cores_init(struct device *cpu) } } -static void model_206ax_init(struct device *cpu) +static void model_206ax_report(void) { + static const char *const mode[] = {"NOT ", ""}; + struct cpuid_result cpuidr; char processor_name[49]; + int vt, txt, aes; + + /* Print processor name */ + fill_processor_name(processor_name); + printk(BIOS_INFO, "CPU: %s.\n", processor_name); + + /* Print platform ID */ + printk(BIOS_INFO, "CPU: platform id %x\n", get_platform_id()); + + /* CPUID and features */ + cpuidr = cpuid(1); + printk(BIOS_INFO, "CPU: cpuid(1) 0x%x\n", cpuidr.eax); + aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0; + txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0; + vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0; + printk(BIOS_INFO, "CPU: AES %ssupported\n", mode[aes]); + printk(BIOS_INFO, "CPU: TXT %ssupported\n", mode[txt]); + printk(BIOS_INFO, "CPU: VT %ssupported\n", mode[vt]); +} + +static void model_206ax_init(struct device *cpu) +{ /* Turn on caching if we haven't already */ x86_enable_cache(); @@ -510,12 +534,8 @@ static void model_206ax_init(struct device *cpu) /* Clear out pending MCEs */ configure_mca(); - /* Print processor name */ - fill_processor_name(processor_name); - printk(BIOS_INFO, "CPU: %s.\n", processor_name); - - /* Print platform ID */ - printk(BIOS_INFO, "CPU: platform id %x\n", get_platform_id()); + /* Print infos */ + model_206ax_report(); /* Setup MTRRs based on physical address size */ x86_setup_mtrrs_with_detect(); diff --git a/src/northbridge/intel/sandybridge/report_platform.c b/src/northbridge/intel/sandybridge/report_platform.c index 6dd760d3c9..7e647d81b3 100644 --- a/src/northbridge/intel/sandybridge/report_platform.c +++ b/src/northbridge/intel/sandybridge/report_platform.c @@ -14,47 +14,9 @@ */ #include <console/console.h> -#include <arch/cpu.h> -#include <string.h> #include <southbridge/intel/bd82x6x/pch.h> -#include <arch/io.h> #include "sandybridge.h" -static void report_cpu_info(void) -{ - struct cpuid_result cpuidr; - u32 i, index; - char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */ - int vt, txt, aes; - const char *mode[] = {"NOT ", ""}; - - index = 0x80000000; - cpuidr = cpuid(index); - if (cpuidr.eax < 0x80000004) { - strcpy(cpu_string, "Platform info not available"); - } else { - u32 *p = (u32*) cpu_string; - for (i = 2; i <= 4; i++) { - cpuidr = cpuid(index + i); - *p++ = cpuidr.eax; - *p++ = cpuidr.ebx; - *p++ = cpuidr.ecx; - *p++ = cpuidr.edx; - } - } - /* Skip leading spaces in CPU name string */ - while (cpu_name[0] == ' ') - cpu_name++; - - cpuidr = cpuid(1); - printk(BIOS_DEBUG, "CPU id(%x): %s\n", cpuidr.eax, cpu_name); - aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0; - txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0; - vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0; - printk(BIOS_DEBUG, "AES %ssupported, TXT %ssupported, VT %ssupported\n", - mode[aes], mode[txt], mode[vt]); -} - static struct { u16 dev_id; const char *dev_name; @@ -125,6 +87,5 @@ static void report_pch_info(void) void report_platform_info(void) { - report_cpu_info(); report_pch_info(); } |