diff options
| -rw-r--r-- | src/mainboard/google/purin/Kconfig | 6 | ||||
| -rw-r--r-- | src/mainboard/google/purin/mainboard.c | 8 | ||||
| -rw-r--r-- | src/soc/broadcom/cygnus/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/soc/broadcom/cygnus/include/soc/memlayout.ld | 1 | ||||
| -rw-r--r-- | src/soc/broadcom/cygnus/include/soc/sdram.h | 3 | ||||
| -rw-r--r-- | src/soc/broadcom/cygnus/romstage.c | 8 | ||||
| -rw-r--r-- | src/soc/broadcom/cygnus/sdram.c | 5 | ||||
| -rw-r--r-- | src/soc/broadcom/cygnus/soc.c | 51 |
8 files changed, 76 insertions, 8 deletions
diff --git a/src/mainboard/google/purin/Kconfig b/src/mainboard/google/purin/Kconfig index b9d73f0331..0d1965f9dc 100644 --- a/src/mainboard/google/purin/Kconfig +++ b/src/mainboard/google/purin/Kconfig @@ -45,16 +45,12 @@ config MAINBOARD_VENDOR string default "Google" -config VBOOT_RAMSTAGE_INDEX - hex - default 0x3 - config BOOT_MEDIA_SPI_BUS int default 0 config DRAM_SIZE_MB int - default 1024 + default 256 endif # BOARD_GOOGLE_PURIN diff --git a/src/mainboard/google/purin/mainboard.c b/src/mainboard/google/purin/mainboard.c index 319cb29273..52f86d8263 100644 --- a/src/mainboard/google/purin/mainboard.c +++ b/src/mainboard/google/purin/mainboard.c @@ -19,6 +19,7 @@ #include <device/device.h> #include <boot/coreboot_tables.h> +#include <symbols.h> static void mainboard_init(device_t dev) { @@ -35,4 +36,11 @@ struct chip_operations mainboard_ops = { void lb_board(struct lb_header *header) { + struct lb_range *dma; + + dma = (struct lb_range *)lb_new_record(header); + dma->tag = LB_TAB_DMA; + dma->size = sizeof(*dma); + dma->range_start = (uintptr_t)_dma_coherent; + dma->range_size = _dma_coherent_size; } diff --git a/src/soc/broadcom/cygnus/Makefile.inc b/src/soc/broadcom/cygnus/Makefile.inc index 6f0c584394..cac9062f76 100644 --- a/src/soc/broadcom/cygnus/Makefile.inc +++ b/src/soc/broadcom/cygnus/Makefile.inc @@ -47,6 +47,8 @@ romstage-y += timer.c ramstage-y += cbmem.c ramstage-y += i2c.c +ramstage-y += sdram.c +ramstage-y += soc.c ramstage-y += timer.c ramstage-$(CONFIG_SPI_FLASH) += spi.c ramstage-$(CONFIG_DRIVERS_UART) += ns16550.c diff --git a/src/soc/broadcom/cygnus/include/soc/memlayout.ld b/src/soc/broadcom/cygnus/include/soc/memlayout.ld index 542174bf02..6342810929 100644 --- a/src/soc/broadcom/cygnus/include/soc/memlayout.ld +++ b/src/soc/broadcom/cygnus/include/soc/memlayout.ld @@ -42,4 +42,5 @@ SECTIONS DRAM_START(0x60000000) RAMSTAGE(0x60000000, 128K) POSTRAM_CBFS_CACHE(0x60100000, 1M) + DMA_COHERENT(0x60200000, 2M) } diff --git a/src/soc/broadcom/cygnus/include/soc/sdram.h b/src/soc/broadcom/cygnus/include/soc/sdram.h index 673d3d4f40..c7d6383e58 100644 --- a/src/soc/broadcom/cygnus/include/soc/sdram.h +++ b/src/soc/broadcom/cygnus/include/soc/sdram.h @@ -20,7 +20,10 @@ #ifndef __SOC_BROADCOM_CYGNUS_SDRAM_H__ #define __SOC_BROADCOM_CYGNUS_SDRAM_H__ +#include <stdint.h> + void ddr_init2(void); void sdram_init(void); +uint32_t sdram_size_mb(void); #endif /* __SOC_BROADCOM_CYGNUS_SDRAM_H__ */ diff --git a/src/soc/broadcom/cygnus/romstage.c b/src/soc/broadcom/cygnus/romstage.c index e581a63356..f293f31d2a 100644 --- a/src/soc/broadcom/cygnus/romstage.c +++ b/src/soc/broadcom/cygnus/romstage.c @@ -55,9 +55,11 @@ void main(void) after_dram_time = timestamp_get(); #endif - mmu_init(); - mmu_config_range(0, 4096, DCACHE_OFF); - dcache_mmu_enable(); + /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ + mmu_config_range((uintptr_t)_dram/MiB, + sdram_size_mb(), DCACHE_WRITEBACK); + mmu_config_range((uintptr_t)_dma_coherent/MiB, + _dma_coherent_size/MiB, DCACHE_OFF); cbmem_initialize_empty(); diff --git a/src/soc/broadcom/cygnus/sdram.c b/src/soc/broadcom/cygnus/sdram.c index 1642842e0c..bab126d66c 100644 --- a/src/soc/broadcom/cygnus/sdram.c +++ b/src/soc/broadcom/cygnus/sdram.c @@ -60,3 +60,8 @@ void sdram_init(void) test_ddr(); } + +uint32_t sdram_size_mb(void) +{ + return CONFIG_DRAM_SIZE_MB; +} diff --git a/src/soc/broadcom/cygnus/soc.c b/src/soc/broadcom/cygnus/soc.c new file mode 100644 index 0000000000..c9597f2b08 --- /dev/null +++ b/src/soc/broadcom/cygnus/soc.c @@ -0,0 +1,51 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <device/device.h> +#include <soc/sdram.h> +#include <stddef.h> +#include <stdlib.h> +#include <symbols.h> + +static void soc_init(device_t dev) +{ + ram_resource(dev, 0, (uintptr_t)_dram/KiB, sdram_size_mb()*(MiB/KiB)); +} + +static void soc_noop(device_t dev) +{ +} + +static struct device_operations soc_ops = { + .read_resources = soc_noop, + .set_resources = soc_noop, + .enable_resources = soc_noop, + .init = soc_init, + .scan_bus = 0, +}; + +static void enable_cygnus_dev(device_t dev) +{ + dev->ops = &soc_ops; +} + +struct chip_operations soc_broadcom_cygnus_ops = { + CHIP_NAME("SOC Broadcom Cygnus") + .enable_dev = enable_cygnus_dev, +}; |