diff options
7 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb b/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb index c7ef264eaa..36c6595feb 100644 --- a/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb @@ -20,7 +20,6 @@ chip soc/intel/cannonlake # FSP configuration register "SaGv" = "3" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" # Intel Common SoC Config diff --git a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb index c3a546ec2d..b014353e0b 100644 --- a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb +++ b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb @@ -29,7 +29,6 @@ chip soc/intel/cannonlake # FSP configuration register "SaGv" = "SaGv_Enabled" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" # Intel Common SoC Config diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb index da439d5473..bb963c9523 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb @@ -6,7 +6,6 @@ chip soc/intel/cannonlake # FSP configuration register "SaGv" = "3" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb index a1c85865f6..55afde2cae 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb @@ -6,7 +6,6 @@ chip soc/intel/cannonlake # FSP configuration register "SaGv" = "3" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb index 4a2fad9540..35aa624481 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb @@ -7,7 +7,6 @@ chip soc/intel/cannonlake # FSP configuration register "SaGv" = "3" register "RMT" = "1" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC5)" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb index 2b47f00d51..bbfc9e7913 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb @@ -7,7 +7,6 @@ chip soc/intel/cannonlake # FSP configuration register "SaGv" = "3" register "RMT" = "1" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC4)" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb index da439d5473..bb963c9523 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb @@ -6,7 +6,6 @@ chip soc/intel/cannonlake # FSP configuration register "SaGv" = "3" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" |