diff options
| -rw-r--r-- | src/mainboard/google/auron/romstage.c | 9 | ||||
| -rw-r--r-- | src/mainboard/google/jecht/romstage.c | 10 | ||||
| -rw-r--r-- | src/mainboard/intel/wtm2/romstage.c | 8 | ||||
| -rw-r--r-- | src/mainboard/purism/librem_bdw/romstage.c | 7 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/include/soc/romstage.h | 4 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/romstage/romstage.c | 45 |
6 files changed, 39 insertions, 44 deletions
diff --git a/src/mainboard/google/auron/romstage.c b/src/mainboard/google/auron/romstage.c index 497489911e..568c4c819c 100644 --- a/src/mainboard/google/auron/romstage.c +++ b/src/mainboard/google/auron/romstage.c @@ -27,17 +27,16 @@ __weak void variant_romstage_entry(struct romstage_params *rp) { } -void mainboard_romstage_entry(struct romstage_params *rp) +void mainboard_pre_raminit(struct romstage_params *rp) { - post_code(0x32); - /* Fill out PEI DATA */ mainboard_fill_pei_data(&rp->pei_data); mainboard_fill_spd_data(&rp->pei_data); - /* Call into the real romstage main with this board's attributes. */ - romstage_common(rp); +} +void mainboard_post_raminit(struct romstage_params *rp) +{ /* Do variant-specific init */ variant_romstage_entry(rp); } diff --git a/src/mainboard/google/jecht/romstage.c b/src/mainboard/google/jecht/romstage.c index 8d1ae8aca2..86888c82f8 100644 --- a/src/mainboard/google/jecht/romstage.c +++ b/src/mainboard/google/jecht/romstage.c @@ -27,17 +27,15 @@ #include "onboard.h" -void mainboard_romstage_entry(struct romstage_params *rp) +void mainboard_pre_raminit(struct romstage_params *rp) { - post_code(0x32); - /* Fill out PEI DATA */ mainboard_fill_pei_data(&rp->pei_data); mainboard_fill_spd_data(&rp->pei_data); +} - /* Call into the real romstage main with this board's attributes. */ - romstage_common(rp); - +void mainboard_post_raminit(struct romstage_params *rp) +{ if (CONFIG(CHROMEOS)) init_bootmode_straps(); } diff --git a/src/mainboard/intel/wtm2/romstage.c b/src/mainboard/intel/wtm2/romstage.c index 5b8df275d8..f4e336694d 100644 --- a/src/mainboard/intel/wtm2/romstage.c +++ b/src/mainboard/intel/wtm2/romstage.c @@ -22,12 +22,12 @@ #include <soc/pei_wrapper.h> #include <soc/romstage.h> -void mainboard_romstage_entry(struct romstage_params *rp) +void mainboard_pre_raminit(struct romstage_params *rp) { - post_code(0x32); - /* Fill out PEI DATA */ mainboard_fill_pei_data(&rp->pei_data); +} - romstage_common(rp); +void mainboard_post_raminit(struct romstage_params *rp) +{ } diff --git a/src/mainboard/purism/librem_bdw/romstage.c b/src/mainboard/purism/librem_bdw/romstage.c index 5330d191b4..0e1ad885b0 100644 --- a/src/mainboard/purism/librem_bdw/romstage.c +++ b/src/mainboard/purism/librem_bdw/romstage.c @@ -18,11 +18,12 @@ #include <soc/pei_wrapper.h> #include <soc/romstage.h> -void mainboard_romstage_entry(struct romstage_params *rp) +void mainboard_pre_raminit(struct romstage_params *rp) { /* Fill out PEI DATA */ mainboard_fill_pei_data(&rp->pei_data); +} - /* Initialize memory */ - romstage_common(rp); +void mainboard_post_raminit(struct romstage_params *rp) +{ } diff --git a/src/soc/intel/broadwell/include/soc/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h index 46f29d62df..d65692ae23 100644 --- a/src/soc/intel/broadwell/include/soc/romstage.h +++ b/src/soc/intel/broadwell/include/soc/romstage.h @@ -27,8 +27,8 @@ struct romstage_params { struct pei_data pei_data; }; -void mainboard_romstage_entry(struct romstage_params *params); -void romstage_common(struct romstage_params *params); +void mainboard_pre_raminit(struct romstage_params *params); +void mainboard_post_raminit(struct romstage_params *params); void raminit(struct pei_data *pei_data); diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index 2a3ac8b8e6..acbca14a88 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -103,47 +103,44 @@ static void romstage_main(uint64_t tsc, uint32_t bist) /* Initialize GPIOs */ init_gpios(mainboard_gpio_config); - /* Call into mainboard. */ - mainboard_romstage_entry(&rp); + /* Fill in mainboard pei_date. */ + mainboard_pre_raminit(&rp); - platform_enter_postcar(); -} - -/* This wrapper enables easy transition towards C_ENVIRONMENT_BOOTBLOCK, - * keeping changes in cache_as_ram.S easy to manage. - */ -asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist) -{ - romstage_main(base_timestamp, bist); -} - -/* Entry from the mainboard. */ -void romstage_common(struct romstage_params *params) -{ post_code(0x32); timestamp_add_now(TS_BEFORE_INITRAM); - params->pei_data.boot_mode = params->power_state->prev_sleep_state; + rp.pei_data.boot_mode = rp.power_state->prev_sleep_state; -#if CONFIG(ELOG_BOOT_COUNT) - if (params->power_state->prev_sleep_state != ACPI_S3) + if (CONFIG(ELOG_BOOT_COUNT) + && rp.power_state->prev_sleep_state != ACPI_S3) boot_count_increment(); -#endif /* Print ME state before MRC */ intel_me_status(); /* Save ME HSIO version */ - intel_me_hsio_version(¶ms->power_state->hsio_version, - ¶ms->power_state->hsio_checksum); + intel_me_hsio_version(&rp.power_state->hsio_version, + &rp.power_state->hsio_checksum); /* Initialize RAM */ - raminit(¶ms->pei_data); + raminit(&rp.pei_data); timestamp_add_now(TS_AFTER_INITRAM); - romstage_handoff_init(params->power_state->prev_sleep_state == ACPI_S3); + romstage_handoff_init(rp.power_state->prev_sleep_state == ACPI_S3); + + mainboard_post_raminit(&rp); + + platform_enter_postcar(); +} + +/* This wrapper enables easy transition towards C_ENVIRONMENT_BOOTBLOCK, + * keeping changes in cache_as_ram.S easy to manage. + */ +asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist) +{ + romstage_main(base_timestamp, bist); } void __weak mainboard_pre_console_init(void) {} |