diff options
| -rw-r--r-- | src/soc/amd/stoneyridge/gpio.c | 16 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 6 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/sb_util.c | 32 |
3 files changed, 42 insertions, 12 deletions
diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c index b747538eaa..285fedd238 100644 --- a/src/soc/amd/stoneyridge/gpio.c +++ b/src/soc/amd/stoneyridge/gpio.c @@ -221,7 +221,6 @@ uint16_t gpio_acpi_pin(gpio_t gpio) void sb_program_gpios(const struct soc_amd_gpio *gpio_list_ptr, size_t size) { - uint8_t *mux_ptr; uint32_t *gpio_ptr, *inter_master; uint32_t control, control_flags, edge_level, direction; uint32_t mask, bit_edge, bit_level; @@ -252,9 +251,8 @@ void sb_program_gpios(const struct soc_amd_gpio *gpio_list_ptr, size_t size) control = gpio_list_ptr[index].control; control_flags = gpio_list_ptr[index].flags; - mux_ptr = (uint8_t *)(uintptr_t)(gpio + ACPIMMIO_IOMUX_BASE); - write8(mux_ptr, mux & AMD_GPIO_MUX_MASK); - read8(mux_ptr); /* Flush posted write */ + iomux_write8(gpio, mux & AMD_GPIO_MUX_MASK); + iomux_read8(gpio); /* Flush posted write */ /* special case if pin 2 is assigned to wake */ if ((gpio == 2) && !(mux & AMD_GPIO_MUX_MASK)) route_sci(GPIO_2_EVENT); @@ -348,11 +346,9 @@ static void save_i2c_pin_registers(uint8_t gpio, struct soc_amd_i2c_save *save_table) { uint32_t *gpio_ptr; - uint8_t *mux_ptr; - mux_ptr = (uint8_t *)(uintptr_t)(gpio + ACPIMMIO_IOMUX_BASE); gpio_ptr = (uint32_t *)gpio_get_address(gpio); - save_table->mux_value = read8(mux_ptr); + save_table->mux_value = iomux_read8(gpio); save_table->control_value = read32(gpio_ptr); } @@ -360,12 +356,10 @@ static void restore_i2c_pin_registers(uint8_t gpio, struct soc_amd_i2c_save *save_table) { uint32_t *gpio_ptr; - uint8_t *mux_ptr; - mux_ptr = (uint8_t *)(uintptr_t)(gpio + ACPIMMIO_IOMUX_BASE); gpio_ptr = (uint32_t *)gpio_get_address(gpio); - write8(mux_ptr, save_table->mux_value); - read8(mux_ptr); + iomux_write8(gpio, save_table->mux_value); + iomux_read8(gpio); write32(gpio_ptr, save_table->control_value); read32(gpio_ptr); } diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index e5ba2af5eb..f755c0a0d4 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -529,6 +529,12 @@ void xhci_pm_write16(uint8_t reg, uint16_t value); uint16_t xhci_pm_read16(uint8_t reg); void xhci_pm_write32(uint8_t reg, uint32_t value); uint32_t xhci_pm_read32(uint8_t reg); +u8 iomux_read8(u8 reg); +u16 iomux_read16(u8 reg); +u32 iomux_read32(u8 reg); +void iomux_write8(u8 reg, u8 value); +void iomux_write16(u8 reg, u16 value); +void iomux_write32(u8 reg, u32 value); uint8_t asf_read8(uint8_t offset); uint16_t asf_read16(uint8_t offset); void asf_write8(uint8_t offset, uint8_t value); diff --git a/src/soc/amd/stoneyridge/sb_util.c b/src/soc/amd/stoneyridge/sb_util.c index 5aec431593..41ebb37be2 100644 --- a/src/soc/amd/stoneyridge/sb_util.c +++ b/src/soc/amd/stoneyridge/sb_util.c @@ -215,7 +215,37 @@ void smbus_write16(u8 reg, u16 value) /* hpet read/write - access registers at 0xfed80c00 - not currently used */ -/* iomux read/write - access registers at 0xfed80d00 - not currently used */ +/* iomux read/write - access registers at 0xfed80d00 */ + +u8 iomux_read8(u8 reg) +{ + return read8((void *)(ACPIMMIO_IOMUX_BASE + reg)); +} + +u16 iomux_read16(u8 reg) +{ + return read16((void *)(ACPIMMIO_IOMUX_BASE + reg)); +} + +u32 iomux_read32(u8 reg) +{ + return read32((void *)(ACPIMMIO_IOMUX_BASE + reg)); +} + +void iomux_write8(u8 reg, u8 value) +{ + write8((void *)(ACPIMMIO_IOMUX_BASE + reg), value); +} + +void iomux_write16(u8 reg, u16 value) +{ + write16((void *)(ACPIMMIO_IOMUX_BASE + reg), value); +} + +void iomux_write32(u8 reg, u32 value) +{ + write32((void *)(ACPIMMIO_IOMUX_BASE + reg), value); +} /* misc read/write - access registers at 0xfed80e00 */ |