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-rw-r--r--src/mainboard/google/brya/variants/redrix/gpio.c3
-rw-r--r--src/mainboard/google/brya/variants/redrix/overridetree.cb46
2 files changed, 17 insertions, 32 deletions
diff --git a/src/mainboard/google/brya/variants/redrix/gpio.c b/src/mainboard/google/brya/variants/redrix/gpio.c
index c89d58c3fa..b82f4035cb 100644
--- a/src/mainboard/google/brya/variants/redrix/gpio.c
+++ b/src/mainboard/google/brya/variants/redrix/gpio.c
@@ -33,6 +33,9 @@ static const struct pad_config override_gpio_table[] = {
/* D13 : ISH_UART0_RXD ==> NC */
PAD_NC_LOCK(GPP_D13, NONE, LOCK_CONFIG),
+ /* D16 : ISH_UART0_CTS# ==> EN_NVM_SENSOR_PWR */
+ PAD_CFG_GPO(GPP_D16, 1, DEEP),
+
/* E3 : PROC_GP0 ==> NC */
PAD_NC(GPP_E3, NONE),
/* E7 : PROC_GP1 ==> NC */
diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb
index 8ea87699c5..4d7d6a5d13 100644
--- a/src/mainboard/google/brya/variants/redrix/overridetree.cb
+++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb
@@ -322,23 +322,20 @@ chip soc/intel/alderlake
register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" #EN_UCAM_LED_PWR
- register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" #EN_UCAM_PWR
- register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" #reset
+ register "gpio_panel.gpio[1].gpio_num" = "GPP_D3" #reset
#_ON
- register "on_seq.ops_cnt" = "5"
+ register "on_seq.ops_cnt" = "4"
register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
- register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
- register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
- register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
+ register "on_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 5)"
+ register "on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
#_OFF
- register "off_seq.ops_cnt" = "4"
+ register "off_seq.ops_cnt" = "3"
register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
- register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
- register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
- register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
+ register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
+ register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
device i2c 36 on
probe CAMERA_UFC CAMERA_NONE
probe CAMERA_UFC CAMERA_OV5675
@@ -364,23 +361,20 @@ chip soc/intel/alderlake
register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" #EN_UCAM_LED_PWR
- register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" #EN_UCAM_PWR
- register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" #reset
+ register "gpio_panel.gpio[1].gpio_num" = "GPP_D3" #reset
#_ON
- register "on_seq.ops_cnt" = "5"
+ register "on_seq.ops_cnt" = "4"
register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
- register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
- register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
- register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
+ register "on_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 5)"
+ register "on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
#_OFF
- register "off_seq.ops_cnt" = "4"
+ register "off_seq.ops_cnt" = "3"
register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
- register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
- register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
- register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
+ register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
+ register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
device i2c 20 on
probe CAMERA_UFC CAMERA_HI556
end
@@ -393,18 +387,6 @@ chip soc/intel/alderlake
register "device_type" = "INTEL_ACPI_CAMERA_NVM"
register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D0"
- register "has_power_resource" = "1"
- #Controls
- register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_UCAM_PWR
-
- #_ON
- register "on_seq.ops_cnt" = "1"
- register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 0)"
-
- #_OFF
- register "off_seq.ops_cnt" = "1"
- register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
-
register "nvm_size" = "0x2000"
register "nvm_pagesize" = "1"
register "nvm_readonly" = "1"