diff options
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/dmi.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/common/pch/lockdown/lockdown.c | 10 |
2 files changed, 10 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/dmi.h b/src/soc/intel/common/block/include/intelblocks/dmi.h index 55bf20d40d..8b12602434 100644 --- a/src/soc/intel/common/block/include/intelblocks/dmi.h +++ b/src/soc/intel/common/block/include/intelblocks/dmi.h @@ -8,6 +8,9 @@ #define PCR_DMI_DMICTL 0x2234 #define PCR_DMI_DMICTL_SRLOCK (1 << 31) +#define PCR_DMI_GCS 0x274C +#define PCR_DMI_GCS_BILD (1 << 0) + /* * Takes base, size and destination ID and configures the GPMR * for accessing the region. diff --git a/src/soc/intel/common/pch/lockdown/lockdown.c b/src/soc/intel/common/pch/lockdown/lockdown.c index b10306edcb..d9495a432b 100644 --- a/src/soc/intel/common/pch/lockdown/lockdown.c +++ b/src/soc/intel/common/pch/lockdown/lockdown.c @@ -2,6 +2,7 @@ #include <bootstate.h> #include <intelblocks/cfg.h> +#include <intelblocks/dmi.h> #include <intelblocks/fast_spi.h> #include <intelblocks/pcr.h> #include <intelpch/lockdown.h> @@ -9,9 +10,6 @@ #include <soc/pcr_ids.h> #include <soc/soc_chip.h> -#define PCR_DMI_GCS 0x274C -#define PCR_DMI_GCS_BILD (1 << 0) - /* * This function will get lockdown config specific to soc. * @@ -40,6 +38,12 @@ static void dmi_lockdown_cfg(void) * "1b": LPC/eSPI */ pcr_or8(PID_DMI, PCR_DMI_GCS, PCR_DMI_GCS_BILD); + + /* + * Set Secure Register Lock (SRL) bit in DMI control register to lock + * DMI configuration. + */ + pcr_or32(PID_DMI, PCR_DMI_DMICTL, PCR_DMI_DMICTL_SRLOCK); } static void fast_spi_lockdown_cfg(int chipset_lockdown) |