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-rw-r--r--src/mainboard/google/puff/variants/ambassador/overridetree.cb1
-rw-r--r--src/mainboard/google/puff/variants/duffy/overridetree.cb1
-rw-r--r--src/mainboard/google/puff/variants/faffy/overridetree.cb1
-rw-r--r--src/mainboard/google/puff/variants/genesis/overridetree.cb1
-rw-r--r--src/mainboard/google/puff/variants/kaisa/overridetree.cb1
-rw-r--r--src/mainboard/google/puff/variants/moonbuggy/overridetree.cb1
-rw-r--r--src/mainboard/google/puff/variants/noibat/overridetree.cb1
-rw-r--r--src/mainboard/google/puff/variants/puff/overridetree.cb1
-rw-r--r--src/mainboard/google/puff/variants/scout/overridetree.cb1
-rw-r--r--src/mainboard/google/puff/variants/wyvern/overridetree.cb1
10 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/google/puff/variants/ambassador/overridetree.cb b/src/mainboard/google/puff/variants/ambassador/overridetree.cb
index 1d574b8306..a96cd25244 100644
--- a/src/mainboard/google/puff/variants/ambassador/overridetree.cb
+++ b/src/mainboard/google/puff/variants/ambassador/overridetree.cb
@@ -395,6 +395,7 @@ chip soc/intel/cannonlake
register "customized_leds" = "0x05af"
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
+ register "enable_aspm_l1_2" = "1"
device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"
diff --git a/src/mainboard/google/puff/variants/duffy/overridetree.cb b/src/mainboard/google/puff/variants/duffy/overridetree.cb
index f6be7a3193..0ccac51019 100644
--- a/src/mainboard/google/puff/variants/duffy/overridetree.cb
+++ b/src/mainboard/google/puff/variants/duffy/overridetree.cb
@@ -454,6 +454,7 @@ chip soc/intel/cannonlake
register "customized_leds" = "0x05af"
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
+ register "enable_aspm_l1_2" = "1"
device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"
diff --git a/src/mainboard/google/puff/variants/faffy/overridetree.cb b/src/mainboard/google/puff/variants/faffy/overridetree.cb
index f4b1a8b951..1a6838420a 100644
--- a/src/mainboard/google/puff/variants/faffy/overridetree.cb
+++ b/src/mainboard/google/puff/variants/faffy/overridetree.cb
@@ -428,6 +428,7 @@ chip soc/intel/cannonlake
register "customized_leds" = "0x05af"
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
+ register "enable_aspm_l1_2" = "1"
device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"
diff --git a/src/mainboard/google/puff/variants/genesis/overridetree.cb b/src/mainboard/google/puff/variants/genesis/overridetree.cb
index b16bbfb2e1..45eda87332 100644
--- a/src/mainboard/google/puff/variants/genesis/overridetree.cb
+++ b/src/mainboard/google/puff/variants/genesis/overridetree.cb
@@ -425,6 +425,7 @@ chip soc/intel/cannonlake
register "customized_leds" = "0x05af"
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
+ register "enable_aspm_l1_2" = "1"
device pci 00.0 on end
end
end
diff --git a/src/mainboard/google/puff/variants/kaisa/overridetree.cb b/src/mainboard/google/puff/variants/kaisa/overridetree.cb
index 1e531b210f..a2af448b58 100644
--- a/src/mainboard/google/puff/variants/kaisa/overridetree.cb
+++ b/src/mainboard/google/puff/variants/kaisa/overridetree.cb
@@ -454,6 +454,7 @@ chip soc/intel/cannonlake
register "customized_leds" = "0x05af"
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
+ register "enable_aspm_l1_2" = "1"
device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"
diff --git a/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb b/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb
index 4896bd8998..3c3b01b925 100644
--- a/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb
+++ b/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb
@@ -427,6 +427,7 @@ chip soc/intel/cannonlake
register "customized_leds" = "0x05af"
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
+ register "enable_aspm_l1_2" = "1"
device pci 00.0 on end
end
end
diff --git a/src/mainboard/google/puff/variants/noibat/overridetree.cb b/src/mainboard/google/puff/variants/noibat/overridetree.cb
index c6768a43d8..29f0fa2b9e 100644
--- a/src/mainboard/google/puff/variants/noibat/overridetree.cb
+++ b/src/mainboard/google/puff/variants/noibat/overridetree.cb
@@ -365,6 +365,7 @@ chip soc/intel/cannonlake
register "customized_leds" = "0x05af"
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
+ register "enable_aspm_l1_2" = "1"
device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"
diff --git a/src/mainboard/google/puff/variants/puff/overridetree.cb b/src/mainboard/google/puff/variants/puff/overridetree.cb
index 52ebf3aa49..da0001a02b 100644
--- a/src/mainboard/google/puff/variants/puff/overridetree.cb
+++ b/src/mainboard/google/puff/variants/puff/overridetree.cb
@@ -389,6 +389,7 @@ chip soc/intel/cannonlake
register "customized_leds" = "0x05af"
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
+ register "enable_aspm_l1_2" = "1"
device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"
diff --git a/src/mainboard/google/puff/variants/scout/overridetree.cb b/src/mainboard/google/puff/variants/scout/overridetree.cb
index 533d0fc100..324f9fbac8 100644
--- a/src/mainboard/google/puff/variants/scout/overridetree.cb
+++ b/src/mainboard/google/puff/variants/scout/overridetree.cb
@@ -405,6 +405,7 @@ chip soc/intel/cannonlake
register "customized_leds" = "0x05af"
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
+ register "enable_aspm_l1_2" = "1"
device pci 00.0 on end
end
end
diff --git a/src/mainboard/google/puff/variants/wyvern/overridetree.cb b/src/mainboard/google/puff/variants/wyvern/overridetree.cb
index 93cd6c9117..0aac160cc7 100644
--- a/src/mainboard/google/puff/variants/wyvern/overridetree.cb
+++ b/src/mainboard/google/puff/variants/wyvern/overridetree.cb
@@ -390,6 +390,7 @@ chip soc/intel/cannonlake
register "customized_leds" = "0x05af"
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
+ register "enable_aspm_l1_2" = "1"
device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"