diff options
10 files changed, 52 insertions, 49 deletions
diff --git a/src/mainboard/amd/mandolin/variants/mandolin/port_descriptors.c b/src/mainboard/amd/mandolin/variants/mandolin/port_descriptors.c index 3625554a42..47e9aad52f 100644 --- a/src/mainboard/amd/mandolin/variants/mandolin/port_descriptors.c +++ b/src/mainboard/amd/mandolin/variants/mandolin/port_descriptors.c @@ -4,7 +4,7 @@ #include <soc/soc_util.h> #include <types.h> -static const fsp_pcie_descriptor pco_pcie_descriptors[] = { +static const fsp_dxio_descriptor pco_dxio_descriptors[] = { { /* MXM */ .port_present = true, .engine_type = PCIE_ENGINE, @@ -94,7 +94,7 @@ static const fsp_pcie_descriptor pco_pcie_descriptors[] = { } }; -static const fsp_pcie_descriptor dali_pcie_descriptors[] = { +static const fsp_dxio_descriptor dali_dxio_descriptors[] = { { /* MXM */ .port_present = true, .engine_type = PCIE_ENGINE, @@ -198,18 +198,18 @@ static const fsp_ddi_descriptor dali_ddi_descriptors[] = { } }; -void mainboard_get_pcie_ddi_descriptors( - const fsp_pcie_descriptor **pcie_descs, size_t *pcie_num, +void mainboard_get_dxio_ddi_descriptors( + const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num, const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num) { if (soc_is_reduced_io_sku()) { /* Dali */ - *pcie_descs = dali_pcie_descriptors; - *pcie_num = ARRAY_SIZE(dali_pcie_descriptors); + *dxio_descs = dali_dxio_descriptors; + *dxio_num = ARRAY_SIZE(dali_dxio_descriptors); *ddi_descs = dali_ddi_descriptors; *ddi_num = ARRAY_SIZE(dali_ddi_descriptors); } else { /* Picasso and default */ - *pcie_descs = pco_pcie_descriptors; - *pcie_num = ARRAY_SIZE(pco_pcie_descriptors); + *dxio_descs = pco_dxio_descriptors; + *dxio_num = ARRAY_SIZE(pco_dxio_descriptors); *ddi_descs = pco_ddi_descriptors; *ddi_num = ARRAY_SIZE(pco_ddi_descriptors); } diff --git a/src/mainboard/google/zork/mainboard.c b/src/mainboard/google/zork/mainboard.c index f3ef5c5a98..1ce87a5611 100644 --- a/src/mainboard/google/zork/mainboard.c +++ b/src/mainboard/google/zork/mainboard.c @@ -165,12 +165,12 @@ static void mainboard_init(void *chip_info) gpe_configure_sci(gpes, num); } -void mainboard_get_pcie_ddi_descriptors(const fsp_pcie_descriptor **pcie_descs, - size_t *pcie_num, +void mainboard_get_dxio_ddi_descriptors(const fsp_dxio_descriptor **dxio_descs, + size_t *dxio_num, const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num) { - variant_get_pcie_ddi_descriptors(pcie_descs, pcie_num, ddi_descs, ddi_num); + variant_get_dxio_ddi_descriptors(dxio_descs, dxio_num, ddi_descs, ddi_num); } /************************************************* diff --git a/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_dalboz.c index 82a11b05fb..8d55db6934 100644 --- a/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_dalboz.c @@ -4,16 +4,16 @@ #include <baseboard/variants.h> #include <commonlib/bsd/compiler.h> -void __weak variant_get_pcie_ddi_descriptors(const fsp_pcie_descriptor **pcie_descs, - size_t *pcie_num, +void __weak variant_get_dxio_ddi_descriptors(const fsp_dxio_descriptor **dxio_descs, + size_t *dxio_num, const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num) { - *pcie_descs = baseboard_get_pcie_descriptors(pcie_num); + *dxio_descs = baseboard_get_dxio_descriptors(dxio_num); *ddi_descs = baseboard_get_ddi_descriptors(ddi_num); } -static const fsp_pcie_descriptor pcie_descriptors[] = { +static const fsp_dxio_descriptor dxio_descriptors[] = { { // NVME SSD .port_present = true, @@ -60,10 +60,10 @@ static const fsp_pcie_descriptor pcie_descriptors[] = { } }; -const fsp_pcie_descriptor *baseboard_get_pcie_descriptors(size_t *num) +const fsp_dxio_descriptor *baseboard_get_dxio_descriptors(size_t *num) { - *num = ARRAY_SIZE(pcie_descriptors); - return pcie_descriptors; + *num = ARRAY_SIZE(dxio_descriptors); + return dxio_descriptors; } const fsp_ddi_descriptor *baseboard_get_ddi_descriptors(size_t *num) diff --git a/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_trembyle.c index 9e82684442..75c2211ee9 100644 --- a/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/fsps_baseboard_trembyle.c @@ -5,12 +5,12 @@ #include <commonlib/bsd/compiler.h> #include <soc/soc_util.h> -void __weak variant_get_pcie_ddi_descriptors(const fsp_pcie_descriptor **pcie_descs, - size_t *pcie_num, +void __weak variant_get_dxio_ddi_descriptors(const fsp_dxio_descriptor **dxio_descs, + size_t *dxio_num, const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num) { - *pcie_descs = baseboard_get_pcie_descriptors(pcie_num); + *dxio_descs = baseboard_get_dxio_descriptors(dxio_num); *ddi_descs = baseboard_get_ddi_descriptors(ddi_num); } @@ -18,7 +18,7 @@ void __weak variant_get_pcie_ddi_descriptors(const fsp_pcie_descriptor **pcie_de * Type 1 parts, while reporting as Picasso through cpuid, are fused like a Dali. * Those parts need to be configured as Type 2. */ -static const fsp_pcie_descriptor pco_pcie_descriptors[] = { +static const fsp_dxio_descriptor pco_dxio_descriptors[] = { { // NVME SSD .port_present = true, @@ -64,7 +64,7 @@ static const fsp_pcie_descriptor pco_pcie_descriptors[] = { } }; -static const fsp_pcie_descriptor dali_pcie_descriptors[] = { +static const fsp_dxio_descriptor dali_dxio_descriptors[] = { { // NVME SSD .port_present = true, @@ -111,16 +111,16 @@ static const fsp_pcie_descriptor dali_pcie_descriptors[] = { } }; -const fsp_pcie_descriptor *baseboard_get_pcie_descriptors(size_t *num) +const fsp_dxio_descriptor *baseboard_get_dxio_descriptors(size_t *num) { /* Type 2 or Type 1 fused like Type 2. */ if (soc_is_reduced_io_sku()) { - *num = ARRAY_SIZE(dali_pcie_descriptors); - return dali_pcie_descriptors; + *num = ARRAY_SIZE(dali_dxio_descriptors); + return dali_dxio_descriptors; } else { /* Type 1 */ - *num = ARRAY_SIZE(pco_pcie_descriptors); - return pco_pcie_descriptors; + *num = ARRAY_SIZE(pco_dxio_descriptors); + return pco_dxio_descriptors; } } diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h index 90e8b04212..aa1a3c8cf4 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h @@ -40,15 +40,15 @@ void variant_pcie_gpio_configure(void); /* Per variant FSP-S initialization, default implementation in baseboard and * overrideable by the variant. */ -void variant_get_pcie_ddi_descriptors(const fsp_pcie_descriptor **pcie_descs, - size_t *pcie_num, +void variant_get_dxio_ddi_descriptors(const fsp_dxio_descriptor **dxio_descs, + size_t *dxio_num, const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num); /* Provide the descriptors for the associated baseboard for the variant. These functions * can be used for obtaining the baseboard's descriptors if the variant followed the * baseboard. */ -const fsp_pcie_descriptor *baseboard_get_pcie_descriptors(size_t *num); +const fsp_dxio_descriptor *baseboard_get_dxio_descriptors(size_t *num); const fsp_ddi_descriptor *baseboard_get_ddi_descriptors(size_t *num); /* Retrieve attributes from FW_CONFIG in CBI. */ diff --git a/src/mainboard/google/zork/variants/dalboz/variant.c b/src/mainboard/google/zork/variants/dalboz/variant.c index ceef2895a0..02121611a1 100644 --- a/src/mainboard/google/zork/variants/dalboz/variant.c +++ b/src/mainboard/google/zork/variants/dalboz/variant.c @@ -179,14 +179,14 @@ static const fsp_ddi_descriptor hdmi_ddi_descriptors[] = { } }; -void variant_get_pcie_ddi_descriptors(const fsp_pcie_descriptor **pcie_descs, - size_t *pcie_num, +void variant_get_dxio_ddi_descriptors(const fsp_dxio_descriptor **dxio_descs, + size_t *dxio_num, const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num) { uint32_t board_sku = sku_id(); - *pcie_descs = baseboard_get_pcie_descriptors(pcie_num); + *dxio_descs = baseboard_get_dxio_descriptors(dxio_num); /* SKU 1, A, and D DB have HDMI, as well as unknown */ /* FIXME: this needs to be fw_config controlled. */ diff --git a/src/mainboard/google/zork/variants/vilboz/variant.c b/src/mainboard/google/zork/variants/vilboz/variant.c index 5573837f9d..cbc160e5c7 100644 --- a/src/mainboard/google/zork/variants/vilboz/variant.c +++ b/src/mainboard/google/zork/variants/vilboz/variant.c @@ -21,12 +21,12 @@ static const fsp_ddi_descriptor hdmi_ddi_descriptors[] = { } }; -void variant_get_pcie_ddi_descriptors(const fsp_pcie_descriptor **pcie_descs, - size_t *pcie_num, +void variant_get_dxio_ddi_descriptors(const fsp_dxio_descriptor **dxio_descs, + size_t *dxio_num, const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num) { - *pcie_descs = baseboard_get_pcie_descriptors(pcie_num); + *dxio_descs = baseboard_get_dxio_descriptors(dxio_num); *ddi_descs = &hdmi_ddi_descriptors[0]; *ddi_num = ARRAY_SIZE(hdmi_ddi_descriptors); diff --git a/src/soc/amd/picasso/fsp_params.c b/src/soc/amd/picasso/fsp_params.c index 80d43fb245..8683e9b836 100644 --- a/src/soc/amd/picasso/fsp_params.c +++ b/src/soc/amd/picasso/fsp_params.c @@ -55,8 +55,8 @@ static void fsps_update_emmc_config(FSP_S_CONFIG *scfg, scfg->emmc0_mode = val; } -static void fill_pcie_descriptors(FSP_S_CONFIG *scfg, - const fsp_pcie_descriptor *descs, size_t num) +static void fill_dxio_descriptors(FSP_S_CONFIG *scfg, + const fsp_dxio_descriptor *descs, size_t num) { size_t i; @@ -76,14 +76,14 @@ static void fill_ddi_descriptors(FSP_S_CONFIG *scfg, } static void fsp_fill_pcie_ddi_descriptors(FSP_S_CONFIG *scfg) { - const fsp_pcie_descriptor *fsp_pcie; + const fsp_dxio_descriptor *fsp_dxio; const fsp_ddi_descriptor *fsp_ddi; - size_t num_pcie; + size_t num_dxio; size_t num_ddi; - mainboard_get_pcie_ddi_descriptors(&fsp_pcie, &num_pcie, + mainboard_get_dxio_ddi_descriptors(&fsp_dxio, &num_dxio, &fsp_ddi, &num_ddi); - fill_pcie_descriptors(scfg, fsp_pcie, num_pcie); + fill_dxio_descriptors(scfg, fsp_dxio, num_dxio); fill_ddi_descriptors(scfg, fsp_ddi, num_ddi); } diff --git a/src/soc/amd/picasso/include/soc/platform_descriptors.h b/src/soc/amd/picasso/include/soc/platform_descriptors.h index c217d75f6c..0ea6f2b338 100644 --- a/src/soc/amd/picasso/include/soc/platform_descriptors.h +++ b/src/soc/amd/picasso/include/soc/platform_descriptors.h @@ -22,9 +22,9 @@ #define EMMC_HS400 10 #define EMMC_HS300 11 -/* Mainboard callback to obtain PCIe and DDI descriptors. */ -void mainboard_get_pcie_ddi_descriptors( - const fsp_pcie_descriptor **pcie_descs, size_t *pcie_num, +/* Mainboard callback to obtain DXI/PCIe and DDI descriptors. */ +void mainboard_get_dxio_ddi_descriptors( + const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num, const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num); #endif /* __PICASSO_PLATFORM_DESCRIPTORS_H__ */ diff --git a/src/vendorcode/amd/fsp/picasso/platform_descriptors.h b/src/vendorcode/amd/fsp/picasso/platform_descriptors.h index acf821b6e2..2faa0abe97 100644 --- a/src/vendorcode/amd/fsp/picasso/platform_descriptors.h +++ b/src/vendorcode/amd/fsp/picasso/platform_descriptors.h @@ -109,8 +109,11 @@ typedef struct __packed { uint8_t reserved; } fsp_ddi_descriptor; -/* Picasso PCIe Descriptor: used for assigning lanes, bifurcation and other settings */ -/* Beware that the lane numbers in here are the logical and not the physical lane numbers! */ +/* + * Picasso DXIO Descriptor: Used for assigning lanes to PCIe/SATA/XGBE engines, configure + * bifurcation and other settings. Beware that the lane numbers in here are the logical and not + * the physical lane numbers! + */ typedef struct __packed { uint8_t engine_type; uint8_t start_logical_lane; // Start lane of the pci device @@ -138,6 +141,6 @@ typedef struct __packed { uint32_t channel_type :3; uint32_t turn_off_unused_lanes :1; uint8_t reserved[4]; -} fsp_pcie_descriptor; +} fsp_dxio_descriptor; #endif /* __PI_PICASSO_PLATFORM_DESCRIPTORS_H__ */ |