diff options
| -rw-r--r-- | src/soc/mediatek/mt8195/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8195/hdmi.c | 25 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8195/include/soc/hdmi.h | 33 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8195/soc.c | 2 |
4 files changed, 61 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc index 26e0da9db7..3439001cba 100644 --- a/src/soc/mediatek/mt8195/Makefile.inc +++ b/src/soc/mediatek/mt8195/Makefile.inc @@ -58,6 +58,7 @@ ramstage-y += dp_intf.c dptx.c dptx_hal.c ramstage-y += emi.c ramstage-y += ../common/flash_controller.c ramstage-y += ../common/gpio.c gpio.c +ramstage-y += hdmi.c ramstage-y += ../common/i2c.c i2c.c ramstage-y += ../common/mcu.c ramstage-y += ../common/mcupm.c diff --git a/src/soc/mediatek/mt8195/hdmi.c b/src/soc/mediatek/mt8195/hdmi.c new file mode 100644 index 0000000000..a1acbe38ed --- /dev/null +++ b/src/soc/mediatek/mt8195/hdmi.c @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <device/mmio.h> +#include <soc/hdmi.h> + +void hdmi_low_power_setting(void) +{ + printk(BIOS_INFO, "%s: Enable HDMI low power setting\n", __func__); + + setbits32((void *)HDMI_PROTECT_REG, BIT(0) | BIT(1)); + + /* HDMI-RX powerdown */ + write32((void *)HDMI_RX_PDN_0_REG, HDMI_RX_PDN_0_VAL); + write32((void *)HDMI_RX_PDN_1_REG, HDMI_RX_PDN_1_VAL); + write32((void *)HDMI_RX_PDN_2_REG, HDMI_RX_PDN_2_VAL); + write32((void *)HDMI_RX_PDN_3_REG, HDMI_RX_PDN_3_VAL); + write32((void *)HDMI_RX_PDN_4_REG, HDMI_RX_PDN_4_VAL); + write32((void *)HDMI_RX_PDN_5_REG, HDMI_RX_PDN_5_VAL); + write32((void *)HDMI_RX_PDN_6_REG, HDMI_RX_PDN_6_VAL); + write32((void *)HDMI_RX_PDN_7_REG, HDMI_RX_PDN_7_VAL); + + /* HDMI-TX powerdown */ + write32((void *)HDMI_TX_PDN_REG, HDMI_TX_PDN_VAL); +} diff --git a/src/soc/mediatek/mt8195/include/soc/hdmi.h b/src/soc/mediatek/mt8195/include/soc/hdmi.h new file mode 100644 index 0000000000..e42a250f6c --- /dev/null +++ b/src/soc/mediatek/mt8195/include/soc/hdmi.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8195_HDMI_H +#define SOC_MEDIATEK_MT8195_HDMI_H + +#define HDMI_TX_BASE_REG 0x11D5F000 +#define HDMI_RX_BASE_REG 0x11D60000 + +#define HDMI_PROTECT_REG (HDMI_TX_BASE_REG + 0xD0) + +#define HDMI_RX_PDN_0_REG (HDMI_RX_BASE_REG + 0x464) +#define HDMI_RX_PDN_1_REG (HDMI_RX_BASE_REG + 0x564) +#define HDMI_RX_PDN_2_REG (HDMI_RX_BASE_REG + 0x468) +#define HDMI_RX_PDN_3_REG (HDMI_RX_BASE_REG + 0x568) +#define HDMI_RX_PDN_4_REG (HDMI_RX_BASE_REG + 0x46c) +#define HDMI_RX_PDN_5_REG (HDMI_RX_BASE_REG + 0x56c) +#define HDMI_RX_PDN_6_REG (HDMI_RX_BASE_REG + 0x2000) +#define HDMI_RX_PDN_7_REG (HDMI_RX_BASE_REG + 0x2080) +#define HDMI_TX_PDN_REG (HDMI_TX_BASE_REG + 0x40) + +#define HDMI_RX_PDN_0_VAL 0xFFFFFC00 +#define HDMI_RX_PDN_1_VAL 0xFFFFFC00 +#define HDMI_RX_PDN_2_VAL 0xFFFFFFFF +#define HDMI_RX_PDN_3_VAL 0xFFFFFFFF +#define HDMI_RX_PDN_4_VAL 0xFFFF000F +#define HDMI_RX_PDN_5_VAL 0xFFFF000F +#define HDMI_RX_PDN_6_VAL 0xFFFF0006 +#define HDMI_RX_PDN_7_VAL 0xFFFF0007 +#define HDMI_TX_PDN_VAL 0x0012C561 + +void hdmi_low_power_setting(void); + +#endif diff --git a/src/soc/mediatek/mt8195/soc.c b/src/soc/mediatek/mt8195/soc.c index 74212207cf..638056487b 100644 --- a/src/soc/mediatek/mt8195/soc.c +++ b/src/soc/mediatek/mt8195/soc.c @@ -3,6 +3,7 @@ #include <device/device.h> #include <soc/devapc.h> #include <soc/emi.h> +#include <soc/hdmi.h> #include <soc/mcupm.h> #include <soc/mmu_operations.h> #include <soc/sspm.h> @@ -21,6 +22,7 @@ static void soc_init(struct device *dev) mcupm_init(); sspm_init(); ufs_disable_refclk(); + hdmi_low_power_setting(); } static struct device_operations soc_ops = { |