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-rw-r--r--src/mainboard/intel/adlrvp/Kconfig1
-rw-r--r--src/mainboard/intel/adlrvp/early_gpio.c8
-rw-r--r--src/mainboard/intel/adlrvp/gpio.c11
-rw-r--r--src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb27
4 files changed, 41 insertions, 6 deletions
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index 3b59d03bea..c970145094 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -31,6 +31,7 @@ config BOARD_INTEL_ADLRVP_P_EXT_EC
select INTEL_LPSS_UART_FOR_CONSOLE
select SOC_INTEL_ALDERLAKE_PCH_P
select GEN3_EXTERNAL_CLOCK_BUFFER
+ select DRIVERS_WWAN_FM350GL
config BOARD_INTEL_ADLRVP_RPL_EXT_EC
select SOC_INTEL_RAPTORLAKE
diff --git a/src/mainboard/intel/adlrvp/early_gpio.c b/src/mainboard/intel/adlrvp/early_gpio.c
index af933ebd8a..932f2d4f2d 100644
--- a/src/mainboard/intel/adlrvp/early_gpio.c
+++ b/src/mainboard/intel/adlrvp/early_gpio.c
@@ -6,8 +6,12 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
- /* WWAN_RST# */
- PAD_CFG_GPO(GPP_F14, 0, PLTRST),
+ /* WWAN_RST# (updated in ramstage) */
+ PAD_CFG_GPO(GPP_F14, 0, DEEP),
+ /* WWAN_PERST_L (updated in ramstage) */
+ PAD_CFG_GPO(GPP_C5, 0, DEEP),
+ /* WWAN_FCPO_L (updated in romstage) */
+ PAD_CFG_GPO(GPP_F15, 0, DEEP),
/* WWAN_PWR_EN */
PAD_CFG_GPO(GPP_F21, 1, DEEP),
/* SMB_CLK */
diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c
index e4483d2257..d7cc6bdfe4 100644
--- a/src/mainboard/intel/adlrvp/gpio.c
+++ b/src/mainboard/intel/adlrvp/gpio.c
@@ -48,13 +48,15 @@ static const struct pad_config gpio_table[] = {
/* WWAN WAKE N*/
PAD_CFG_GPI_IRQ_WAKE(GPP_D18, NONE, DEEP, LEVEL, INVERT),
/* WWAN_DISABLE_N */
- PAD_CFG_GPO(GPP_D15, 1, PLTRST),
+ PAD_CFG_GPO(GPP_D15, 1, DEEP),
/* WWAN_RST# */
- PAD_CFG_GPO(GPP_F14, 1, PLTRST),
+ PAD_CFG_GPO(GPP_F14, 1, DEEP),
+ /* WWAN_FCP_OFF_N */
+ PAD_CFG_GPO(GPP_F15, 1, DEEP),
/* WWAN_PWR_EN */
PAD_CFG_GPO(GPP_F21, 1, DEEP),
/* WWAN_PERST# */
- PAD_CFG_GPO(GPP_C5, 1, PLTRST),
+ PAD_CFG_GPO(GPP_C5, 1, DEEP),
/* PEG_SLOT_WAKE_N */
PAD_CFG_GPI(GPP_A20, NONE, PLTRST),
/* CAM CONN1 CLKEN */
@@ -257,7 +259,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_H20, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H21, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1),
- PAD_NC(GPP_H23, NONE),
+ /* H23 : CLKREQ5_WWAN_N */
+ PAD_CFG_NF(GPP_H23, NONE, DEEP, NF1),
/* A21 : HDMI CRLS CTRLCLK */
PAD_CFG_NF(GPP_A21, NONE, DEEP, NF1),
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb
index de5471cf65..2eea1e4583 100644
--- a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb
+++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb
@@ -57,5 +57,32 @@ chip soc/intel/alderlake
end
end
end
+ device ref pcie_rp6 on
+ # Enable WWAN PCIE 6 using clk 5
+ register "pch_pcie_rp[PCH_RP(6)]" = "{
+ .clk_src = 5,
+ .clk_req = 5,
+ .flags = PCIE_RP_LTR | PCIE_RP_AER,
+ }"
+ chip soc/intel/common/block/pcie/rtd3
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C5)"
+ register "reset_off_delay_ms" = "20"
+ register "srcclk_pin" = "5"
+ register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
+ register "skip_on_off_support" = "true"
+ device generic 0 alias rp6_rtd3 on
+ end
+ end
+ chip drivers/wwan/fm
+ register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F15)"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F14)"
+ register "perst_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C5)"
+ register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
+ register "add_acpi_dma_property" = "true"
+ use rp6_rtd3 as rtd3dev
+ device generic 0 on
+ end
+ end
+ end
end
end