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-rw-r--r--src/soc/intel/broadwell/pch/Kconfig2
-rw-r--r--src/southbridge/intel/bd82x6x/Kconfig2
-rw-r--r--src/southbridge/intel/common/Kconfig.common3
-rw-r--r--src/southbridge/intel/common/Makefile.inc2
-rw-r--r--src/southbridge/intel/common/madt.c19
-rw-r--r--src/southbridge/intel/lynxpoint/Kconfig2
6 files changed, 3 insertions, 27 deletions
diff --git a/src/soc/intel/broadwell/pch/Kconfig b/src/soc/intel/broadwell/pch/Kconfig
index 63f0439e6a..bd1bea5f20 100644
--- a/src/soc/intel/broadwell/pch/Kconfig
+++ b/src/soc/intel/broadwell/pch/Kconfig
@@ -4,6 +4,7 @@ config INTEL_LYNXPOINT_LP
config PCH_SPECIFIC_OPTIONS
def_bool y
+ select ACPI_COMMON_MADT_IOAPIC
select ACPI_COMMON_MADT_LAPIC
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_SOC_NVS
@@ -17,7 +18,6 @@ config PCH_SPECIFIC_OPTIONS
select INTEL_DESCRIPTOR_MODE_CAPABLE
select INTEL_LYNXPOINT_LP
select RTC
- select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_RESET
select SOUTHBRIDGE_INTEL_COMMON_RTC
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index a0d8605e87..5ba913dac5 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -10,6 +10,7 @@ if SOUTHBRIDGE_INTEL_BD82X6X || SOUTHBRIDGE_INTEL_C216
config SOUTH_BRIDGE_OPTIONS
def_bool y
+ select ACPI_COMMON_MADT_IOAPIC
select ACPI_COMMON_MADT_LAPIC
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_SOC_NVS
@@ -34,7 +35,6 @@ config SOUTH_BRIDGE_OPTIONS
select RTC
select HAVE_INTEL_CHIPSET_LOCKDOWN
select SOUTHBRIDGE_INTEL_COMMON_SMM
- select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
select TCO_SPACE_NOT_YET_SPLIT
diff --git a/src/southbridge/intel/common/Kconfig.common b/src/southbridge/intel/common/Kconfig.common
index 0caf96437f..2da6971326 100644
--- a/src/southbridge/intel/common/Kconfig.common
+++ b/src/southbridge/intel/common/Kconfig.common
@@ -61,9 +61,6 @@ config SOUTHBRIDGE_INTEL_COMMON_SMM
select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
select SOUTHBRIDGE_INTEL_COMMON_PMBASE
-config SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
- bool
-
config SOUTHBRIDGE_INTEL_COMMON_FINALIZE
bool
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index fe61af101f..2f4c777561 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -50,8 +50,6 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ) += rcba_pirq.c
ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smi.c
smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smihandler.c
-ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT) += madt.c
-
smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c
all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC) += rtc.c
diff --git a/src/southbridge/intel/common/madt.c b/src/southbridge/intel/common/madt.c
deleted file mode 100644
index 24823919fc..0000000000
--- a/src/southbridge/intel/common/madt.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <acpi/acpi.h>
-#include <arch/ioapic.h>
-#include <arch/smp/mpspec.h>
-
-unsigned long acpi_fill_madt(unsigned long current)
-{
- /* IOAPIC */
- current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
-
- /* INT_SRC_OVR */
- current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
- current, 0, 0, 2, 0);
- current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
- current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH);
-
- return current;
-}
diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig
index 9cea74bc32..af346ab4c8 100644
--- a/src/southbridge/intel/lynxpoint/Kconfig
+++ b/src/southbridge/intel/lynxpoint/Kconfig
@@ -7,6 +7,7 @@ if SOUTHBRIDGE_INTEL_LYNXPOINT
config SOUTH_BRIDGE_OPTIONS
def_bool y
+ select ACPI_COMMON_MADT_IOAPIC
select ACPI_COMMON_MADT_LAPIC
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_SOC_NVS
@@ -14,7 +15,6 @@ config SOUTH_BRIDGE_OPTIONS
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9
- select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
select SOUTHBRIDGE_INTEL_COMMON_FINALIZE
select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
select SOUTHBRIDGE_INTEL_COMMON_PMBASE