diff options
| -rw-r--r-- | src/soc/intel/apollolake/Kconfig | 5 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/Makefile.inc | 10 |
2 files changed, 14 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index a6ff1d54e7..d23f31c20b 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -28,7 +28,6 @@ config CPU_SPECIFIC_OPTIONS select BOOT_DEVICE_SUPPORTS_WRITES # CPU specific options select CPU_INTEL_COMMON - select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_SUPPORTS_PM_TIMER_EMULATION select PCR_COMMON_IOSF_1_0 select SSE2 @@ -414,4 +413,8 @@ config INTEL_GMA_BCLM_OFFSET config INTEL_GMA_BCLM_WIDTH default 32 +config BOOTBLOCK_IN_CBFS + bool + default n + endif diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 29ef9e5808..a6d42247e2 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -146,6 +146,16 @@ $(call add_intermediate, write_ifwi, $(objcbfs)/bootblock.bin $(IFWITOOL)) $(CBFSTOOL) $< write -r $(CONFIG_IFWI_FMAP_NAME) -f $(objcbfs)/ifwi.bin.tmp --fill-upward endif +# When booting APL the IBBL loader places the microcode updates embedded +# in the IFWI image and a matching FIT table in SRAM. After copying the +# bootblock to SRAM, it updates the FIT pointer at 0xffffffc0 to point +# to that table. Before releasing the x86 cores from reset, the regular FIT +# mechanism does the updates. So coreboot does not need to generate a FIT +# table + pointer, but reserving the pointer is still needed. Otherwise the +# IBBL loader thrashes code there. So include fit.c so that the linker +# reserves that pointer. +bootblock-y += ../../../cpu/intel/fit/fit.c + # DSP firmware settings files. ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y) NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/glk/nhlt-blobs |