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-rw-r--r--src/soc/intel/meteorlake/chip.h3
-rw-r--r--src/soc/intel/meteorlake/chipset.cb3
-rw-r--r--src/soc/intel/meteorlake/fsp_params.c3
3 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h
index d4abed88c2..dbe5eb1c40 100644
--- a/src/soc/intel/meteorlake/chip.h
+++ b/src/soc/intel/meteorlake/chip.h
@@ -242,6 +242,9 @@ struct soc_intel_meteorlake_config {
*/
uint8_t serial_io_gspi_cs_state[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX];
+ /* CNVi WiFi Core Enable/Disable */
+ bool cnvi_wifi_core;
+
/* CNVi BT Core Enable/Disable */
bool cnvi_bt_core;
diff --git a/src/soc/intel/meteorlake/chipset.cb b/src/soc/intel/meteorlake/chipset.cb
index 0962a7cbb2..3af284c1a1 100644
--- a/src/soc/intel/meteorlake/chipset.cb
+++ b/src/soc/intel/meteorlake/chipset.cb
@@ -18,6 +18,9 @@ chip soc/intel/meteorlake
# putting it under register "common_soc_config" in overridetree.cb file.
register "common_soc_config.pch_thermal_trip" = "130"
+ # Enable CNVi WiFi
+ register "cnvi_wifi_core" = "true"
+
device domain 0 on
device pci 00.0 alias system_agent on end
device pci 01.0 alias pcie_rp12 off end
diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c
index d345f1b27d..4127ff7628 100644
--- a/src/soc/intel/meteorlake/fsp_params.c
+++ b/src/soc/intel/meteorlake/fsp_params.c
@@ -562,8 +562,11 @@ static void fill_fsps_cnvi_params(FSP_S_CONFIG *s_cfg,
{
/* CNVi */
s_cfg->CnviMode = is_devfn_enabled(PCI_DEVFN_CNVI_WIFI);
+ s_cfg->CnviWifiCore = config->cnvi_wifi_core;
s_cfg->CnviBtCore = config->cnvi_bt_core;
s_cfg->CnviBtAudioOffload = config->cnvi_bt_audio_offload;
+ /* Assert if CNVi WiFi is enabled without CNVi being enabled. */
+ assert(s_cfg->CnviMode || !s_cfg->CnviWifiCore);
/* Assert if CNVi BT is enabled without CNVi being enabled. */
assert(s_cfg->CnviMode || !s_cfg->CnviBtCore);
/* Assert if CNVi BT offload is enabled without CNVi BT being enabled. */