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-rw-r--r--src/northbridge/intel/haswell/pei_data.h6
-rw-r--r--src/northbridge/intel/haswell/raminit.h8
2 files changed, 10 insertions, 4 deletions
diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h
index 4f2f80dff5..14d8b719a9 100644
--- a/src/northbridge/intel/haswell/pei_data.h
+++ b/src/northbridge/intel/haswell/pei_data.h
@@ -10,8 +10,6 @@ typedef void (*tx_byte_func)(unsigned char byte);
#define SPD_LEN 256
-#define MAX_USB2_PORTS 16
-#define MAX_USB3_PORTS 16
#define USB_OC_PIN_SKIP 8
enum usb2_port_location {
@@ -82,8 +80,8 @@ struct pei_data
uint32_t max_ddr3_freq;
/* Route all USB ports to XHCI controller in resume path */
int usb_xhci_on_resume;
- struct usb2_port_setting usb2_ports[MAX_USB2_PORTS];
- struct usb3_port_setting usb3_ports[MAX_USB3_PORTS];
+ struct usb2_port_setting usb2_ports[16];
+ struct usb3_port_setting usb3_ports[16];
uint8_t spd_data[4][SPD_LEN];
tx_byte_func tx_byte;
} __packed;
diff --git a/src/northbridge/intel/haswell/raminit.h b/src/northbridge/intel/haswell/raminit.h
index ab245d85a1..400ac2d4ce 100644
--- a/src/northbridge/intel/haswell/raminit.h
+++ b/src/northbridge/intel/haswell/raminit.h
@@ -13,6 +13,14 @@ struct spd_info {
unsigned int spd_index;
};
+#if CONFIG(INTEL_LYNXPOINT_LP)
+#define MAX_USB2_PORTS 10
+#define MAX_USB3_PORTS 4
+#else
+#define MAX_USB2_PORTS 14
+#define MAX_USB3_PORTS 6
+#endif
+
/* Mainboard-specific USB configuration */
extern const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS];
extern const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS];