diff options
| -rw-r--r-- | src/arch/riscv/bootblock.S | 7 | ||||
| -rw-r--r-- | src/mainboard/emulation/spike-riscv/memlayout.ld | 14 |
2 files changed, 13 insertions, 8 deletions
diff --git a/src/arch/riscv/bootblock.S b/src/arch/riscv/bootblock.S index 029e9e48a3..e75e1ca407 100644 --- a/src/arch/riscv/bootblock.S +++ b/src/arch/riscv/bootblock.S @@ -34,8 +34,11 @@ machine_handler: .globl _start _start: +#define STACK_START 0x80800000 /* 2GiB + 8MiB */ +#define STACK_SIZE 0x0000fff0 + // pending figuring out this f-ing toolchain. Hardcode what we know works. - li sp, 0x80FFF0 // stack start + stack size + li sp, STACK_START + STACK_SIZE # make room for HLS and initialize it addi sp, sp, -64 // MENTRY_FRAME_SIZE @@ -43,7 +46,7 @@ _start: call hls_init //poison the stack - li t1, 0x800000 + li t1, STACK_START li t0, 0xdeadbeef sd t0, 0(t1) diff --git a/src/mainboard/emulation/spike-riscv/memlayout.ld b/src/mainboard/emulation/spike-riscv/memlayout.ld index 276483f336..8d35a64a9c 100644 --- a/src/mainboard/emulation/spike-riscv/memlayout.ld +++ b/src/mainboard/emulation/spike-riscv/memlayout.ld @@ -17,12 +17,14 @@ #include <arch/header.ld> +#define START 0x80000000 + SECTIONS { - DRAM_START(0x0) - BOOTBLOCK(0x0, 64K) - STACK(8M, 64K) - ROMSTAGE(8M + 64K, 128K) - PRERAM_CBMEM_CONSOLE(8M + 192k, 8K) - RAMSTAGE(8M + 200K, 256K) + DRAM_START(START) + BOOTBLOCK(START, 64K) + STACK(START + 8M, 64K) + ROMSTAGE(START + 8M + 64K, 128K) + PRERAM_CBMEM_CONSOLE(START + 8M + 192k, 8K) + RAMSTAGE(START + 8M + 200K, 256K) } |