diff options
| -rw-r--r-- | src/soc/intel/apollolake/Kconfig | 4 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/reset.c | 50 |
3 files changed, 56 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 98ce7d8c3c..d830a9f038 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -59,9 +59,11 @@ config TPM_ON_FAST_SPI TPM part is conntected on Fast SPI interface, but the LPC MMIO TPM transactions are decoded and serialized over the SPI interface. +# TODO(furquan): Use common reset once USB LDO issue is resolved in future +# steppings. config SOC_INTEL_COMMON_RESET bool - default y + default n config MMCONF_BASE_ADDRESS hex "PCI MMIO Base Address" diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 9e4e160e35..a03ac49961 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -28,6 +28,7 @@ romstage-y += meminit.c romstage-y += mmap_boot.c romstage-y += tsc_freq.c romstage-y += pmutil.c +romstage-y += reset.c smm-y += mmap_boot.c smm-y += pmutil.c @@ -52,6 +53,7 @@ ramstage-y += tsc_freq.c ramstage-y += pmutil.c ramstage-y += pmc.c ramstage-y += smi.c +ramstage-y += reset.c postcar-y += exit_car.S postcar-y += memmap.c @@ -65,6 +67,7 @@ verstage-y += mmap_boot.c verstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c verstage-y += tsc_freq.c verstage-y += pmutil.c +verstage-y += reset.c CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include diff --git a/src/soc/intel/apollolake/reset.c b/src/soc/intel/apollolake/reset.c new file mode 100644 index 0000000000..eb43c41262 --- /dev/null +++ b/src/soc/intel/apollolake/reset.c @@ -0,0 +1,50 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright (C) 2014-2016 Google Inc. + * Copyright (C) 2015 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/hlt.h> +#include <arch/io.h> +#include <halt.h> +#include <reset.h> + +/* Reset control port */ +#define RST_CNT 0xcf9 +#define FULL_RST (1 << 3) +#define RST_CPU (1 << 2) +#define SYS_RST (1 << 1) + +/* + * Temporary disable cold reboot on Apollolake platform due to USB LDO issue. + * Should be fixed in later stepping. + */ +void hard_reset(void) +{ + soft_reset(); +} + +void soft_reset(void) +{ + /* PMC_PLTRST# asserted. */ + outb(RST_CPU | SYS_RST, RST_CNT); + halt(); +} + +void cpu_reset(void) +{ + /* Sends INIT# to CPU */ + outb(RST_CPU, RST_CNT); + halt(); +} |