diff options
| -rw-r--r-- | src/soc/intel/common/block/cpu/cpulib.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cpulib.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/common/block/sgx/sgx.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/skylake/finalize.c | 3 |
4 files changed, 5 insertions, 6 deletions
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 34ec233164..81e42aeda5 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -355,7 +355,7 @@ void mca_configure(void) } } -void cpu_lt_lock_memory(void *unused) +void cpu_lt_lock_memory(void) { msr_set(MSR_LT_CONTROL, LT_CONTROL_LOCK); } diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index 6fc31b374e..7e3deb0fd4 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -151,7 +151,7 @@ uint32_t cpu_get_max_turbo_ratio(void); void mca_configure(void); /* Lock chipset memory registers to protect SMM */ -void cpu_lt_lock_memory(void *unused); +void cpu_lt_lock_memory(void); /* Get a supported PRMRR size in bytes with respect to users choice */ int get_valid_prmrr_size(void); diff --git a/src/soc/intel/common/block/sgx/sgx.c b/src/soc/intel/common/block/sgx/sgx.c index b5c8944a9b..c391ec7a96 100644 --- a/src/soc/intel/common/block/sgx/sgx.c +++ b/src/soc/intel/common/block/sgx/sgx.c @@ -205,9 +205,9 @@ void sgx_configure(void *unused) if (owner_epoch_update() < 0) return; + /* Ensure to lock memory before reloading microcode patch */ if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY)) - /* Ensure to lock memory before reload microcode patch */ - cpu_lt_lock_memory(NULL); + cpu_lt_lock_memory(); /* * Update just on the first CPU in the core. Other siblings diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c index f8b36a48bd..ebbd3da238 100644 --- a/src/soc/intel/skylake/finalize.c +++ b/src/soc/intel/skylake/finalize.c @@ -84,8 +84,7 @@ static void soc_lockdown(struct device *dev) pci_write_config8(dev, GEN_PMCON_A, reg8); } - /* Lock chipset memory registers to protect SMM */ - mp_run_on_all_cpus(cpu_lt_lock_memory, NULL); + cpu_lt_lock_memory(); } static void soc_finalize(void *unused) |