diff options
| -rw-r--r-- | src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c | 14 | ||||
| -rw-r--r-- | src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c | 14 |
2 files changed, 20 insertions, 8 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index 3953a92e2d..5d68ee9917 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -64,7 +64,7 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { /* EC_AP_INT_ODL (Sensor Framesync) */ PAD_GPI(GPIO_31, PULL_NONE), /* EN_PWR_TOUCHSCREEN */ - PAD_GPO(GPIO_32, LOW), + PAD_GPO(GPIO_32, HIGH), /* GPIO_33 - GPIO_39: Not available */ /* NVME_AUX_RESET_L */ PAD_GPO(GPIO_40, HIGH), @@ -148,8 +148,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { PAD_NF(GPIO_138, UART0_TXD, PULL_NONE), /* DEV_BEEP_BCLK */ PAD_GPI(GPIO_139, PULL_NONE), - /* USI_RESET_L */ - PAD_GPO(GPIO_140, LOW), + /* TOUCHSCREEN_RESET_L */ + PAD_GPO(GPIO_140, HIGH), /* USB_HUB_RST_L */ PAD_GPO(GPIO_141, HIGH), /* SD_AUX_RESET_L */ @@ -354,7 +354,13 @@ const struct soc_amd_gpio *variant_early_gpio_table(size_t *size) return early_gpio_table; } -static const struct soc_amd_gpio romstage_gpio_table[] = {}; +static const struct soc_amd_gpio romstage_gpio_table[] = { + /* Enable touchscreen, hold in reset */ + /* EN_PWR_TOUCHSCREEN */ + PAD_GPO(GPIO_32, HIGH), + /* TOUCHSCREEN_RESET_L */ + PAD_GPO(GPIO_140, LOW), +}; const struct soc_amd_gpio *baseboard_romstage_gpio_table(size_t *size) { diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index 17c00db4a8..ef9eab2c65 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -108,7 +108,7 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { /* GPIO_89 - unused */ PAD_NC(GPIO_89), /* EN_PWR_TOUCHSCREEN */ - PAD_GPO(GPIO_90, LOW), + PAD_GPO(GPIO_90, HIGH), /* EN_SPKR */ PAD_GPO(GPIO_91, LOW), /* CLK_REQ0_L - WIFI */ @@ -160,8 +160,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { PAD_NF(GPIO_138, UART0_TXD, PULL_NONE), /* DEV_BEEP_BCLK */ PAD_GPI(GPIO_139, PULL_NONE), - /* USI_RESET_L */ - PAD_GPO(GPIO_140, LOW), + /* TOUCHSCREEN_RESET_L */ + PAD_GPO(GPIO_140, HIGH), /* UART1_RXD - FPMCU */ PAD_NF(GPIO_141, UART1_RXD, PULL_NONE), /* SD_AUX_RESET_L */ @@ -403,7 +403,13 @@ const struct soc_amd_gpio *variant_early_gpio_table(size_t *size) return early_gpio_table; } -static const struct soc_amd_gpio romstage_gpio_table[] = {}; +static const struct soc_amd_gpio romstage_gpio_table[] = { + /* Enable touchscreen, hold in reset */ + /* EN_PWR_TOUCHSCREEN */ + PAD_GPO(GPIO_32, HIGH), + /* TOUCHSCREEN_RESET_L */ + PAD_GPO(GPIO_140, LOW), +}; const struct soc_amd_gpio *baseboard_romstage_gpio_table(size_t *size) { |