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-rw-r--r--src/include/cpu/intel/msr.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/include/cpu/intel/msr.h b/src/include/cpu/intel/msr.h
index 9d2b62f3d6..097ddb6e27 100644
--- a/src/include/cpu/intel/msr.h
+++ b/src/include/cpu/intel/msr.h
@@ -7,10 +7,6 @@
* Common MSRs for Intel CPUs
*/
-#define MSR_FEATURE_CONFIG 0x13c
-#define AESNI_DISABLE (1 << 1)
-#define AESNI_LOCK (1 << 0)
-
#define MSR_PIC_MSG_CONTROL 0x2e
#define TPR_UPDATES_DISABLE (1 << 10)
@@ -26,6 +22,10 @@
#define B_BOOT_GUARD_SACM_INFO_BTG_CAPABILITY (1ull << 32)
#define B_BOOT_GUARD_SACM_INFO_TXT_CAPABILITY (1ull << 34)
+#define MSR_FEATURE_CONFIG 0x13c
+#define AESNI_DISABLE (1 << 1)
+#define AESNI_LOCK (1 << 0)
+
#define MSR_PKG_C10_RESIDENCY 0x632
#endif /* CPU_INTEL_MSR_H */