diff options
-rw-r--r-- | src/northbridge/intel/haswell/memmap.c | 2 | ||||
-rw-r--r-- | src/soc/intel/broadwell/memmap.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/haswell/memmap.c b/src/northbridge/intel/haswell/memmap.c index a86efeb788..807ee2a358 100644 --- a/src/northbridge/intel/haswell/memmap.c +++ b/src/northbridge/intel/haswell/memmap.c @@ -18,7 +18,7 @@ static uintptr_t smm_region_start(void) * 1 MiB alignment. */ uintptr_t tom = pci_read_config32(HOST_BRIDGE, TSEG); - return tom & ~((1 << 20) - 1); + return ALIGN_DOWN(tom, 1 * MiB); } void *cbmem_top_chipset(void) diff --git a/src/soc/intel/broadwell/memmap.c b/src/soc/intel/broadwell/memmap.c index bada5fd1c1..4673cceca0 100644 --- a/src/soc/intel/broadwell/memmap.c +++ b/src/soc/intel/broadwell/memmap.c @@ -18,7 +18,7 @@ static uintptr_t dpr_region_start(void) * must be calculated from the size in MiB in bits 11:4. */ uintptr_t dpr = pci_read_config32(SA_DEV_ROOT, DPR); - uintptr_t tom = dpr & ~((1 << 20) - 1); + uintptr_t tom = ALIGN_DOWN(dpr, 1 * MiB); /* Subtract DMA Protected Range size if enabled */ if (dpr & DPR_EPM) |