diff options
| -rw-r--r-- | src/soc/intel/meteorlake/bootblock/bootblock.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/bootblock/soc_die.c | 34 |
2 files changed, 20 insertions, 16 deletions
diff --git a/src/soc/intel/meteorlake/bootblock/bootblock.c b/src/soc/intel/meteorlake/bootblock/bootblock.c index 74e9dca663..c7e1826d23 100644 --- a/src/soc/intel/meteorlake/bootblock/bootblock.c +++ b/src/soc/intel/meteorlake/bootblock/bootblock.c @@ -11,8 +11,8 @@ asmlinkage void bootblock_c_entry(uint64_t base_timestamp) void bootblock_soc_early_init(void) { - bootblock_ioe_die_early_init(); bootblock_soc_die_early_init(); + bootblock_ioe_die_early_init(); } void bootblock_soc_init(void) diff --git a/src/soc/intel/meteorlake/bootblock/soc_die.c b/src/soc/intel/meteorlake/bootblock/soc_die.c index b852e10a91..f48981c07c 100644 --- a/src/soc/intel/meteorlake/bootblock/soc_die.c +++ b/src/soc/intel/meteorlake/bootblock/soc_die.c @@ -69,22 +69,8 @@ static void soc_die_early_iorange_init(void) pch_enable_lpc(); } -void bootblock_soc_die_early_init(void) +static void soc_die_early_ip_init(void) { - const struct sa_mmio_descriptor soc_fixed_pci_resources[] = { - { MCHBAR, MCH_BASE_ADDRESS, MCH_BASE_SIZE, "MCHBAR" }, - }; - - bootblock_systemagent_early_init(); - - /* Enable MCHBAR early, needed by IOC driver */ - sa_set_pci_bar(soc_fixed_pci_resources, ARRAY_SIZE(soc_fixed_pci_resources)); - - fast_spi_cache_bios_region(); - soc_die_early_iorange_init(); - if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE)) - uart_bootblock_init(); - /* * Perform P2SB configuration before any another controller initialization as the * controller might want to perform PCR settings. @@ -102,6 +88,24 @@ void bootblock_soc_die_early_init(void) soc_die_config_pwrmbase(); } +void bootblock_soc_die_early_init(void) +{ + const struct sa_mmio_descriptor soc_fixed_pci_resources[] = { + { MCHBAR, MCH_BASE_ADDRESS, MCH_BASE_SIZE, "MCHBAR" }, + }; + + bootblock_systemagent_early_init(); + soc_die_early_ip_init(); + + /* Enable MCHBAR early, needed by IOC driver */ + sa_set_pci_bar(soc_fixed_pci_resources, ARRAY_SIZE(soc_fixed_pci_resources)); + + fast_spi_cache_bios_region(); + soc_die_early_iorange_init(); + if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE)) + uart_bootblock_init(); +} + static void soc_die_config_acpibase(void) { uint32_t pmc_reg_value; |