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-rw-r--r--src/mainboard/google/rex/variants/screebo/gpio.c2
-rw-r--r--src/mainboard/google/rex/variants/screebo/overridetree.cb15
2 files changed, 16 insertions, 1 deletions
diff --git a/src/mainboard/google/rex/variants/screebo/gpio.c b/src/mainboard/google/rex/variants/screebo/gpio.c
index 7f5f72fa6f..f31506c1b6 100644
--- a/src/mainboard/google/rex/variants/screebo/gpio.c
+++ b/src/mainboard/google/rex/variants/screebo/gpio.c
@@ -398,7 +398,7 @@ static const struct pad_config romstage_gpio_table[] = {
PAD_CFG_GPO(GPP_B08, 0, DEEP),
/* A20 : [] ==> SSD_PERST_L */
PAD_CFG_GPO(GPP_A20, 0, DEEP),
- /* GPP_C23 : [] ==> FP_RST_ODL */
+ /* GPP_C21 : [] ==> FP_RST_ODL */
PAD_CFG_GPO(GPP_C21, 0, DEEP),
/* GPP_D02 : [] ==> SD_PERST_L */
PAD_CFG_GPO(GPP_D02, 1, DEEP),
diff --git a/src/mainboard/google/rex/variants/screebo/overridetree.cb b/src/mainboard/google/rex/variants/screebo/overridetree.cb
index 9e3f9f6511..2e7b208329 100644
--- a/src/mainboard/google/rex/variants/screebo/overridetree.cb
+++ b/src/mainboard/google/rex/variants/screebo/overridetree.cb
@@ -319,6 +319,21 @@ chip soc/intel/meteorlake
device i2c 50 on end
end
end
+ device ref gspi1 on
+ chip drivers/spi/acpi
+ register "name" = ""CRFP""
+ register "hid" = "ACPI_DT_NAMESPACE_HID"
+ register "uid" = "1"
+ register "compat_string" = ""google,cros-ec-spi""
+ register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E10_IRQ)"
+ register "wake" = "GPE0_DW1_10"
+ register "has_power_resource" = "1"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C21)"
+ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B08)"
+ register "enable_delay_ms" = "3"
+ device spi 0 on end
+ end # FPMCU
+ end
device ref soc_espi on
chip ec/google/chromeec
use conn0 as mux_conn[0]