diff options
| -rw-r--r-- | util/inteltool/gpio.c | 2 | ||||
| -rw-r--r-- | util/inteltool/gpio_groups.c | 2 | ||||
| -rw-r--r-- | util/inteltool/inteltool.c | 12 | ||||
| -rw-r--r-- | util/inteltool/inteltool.h | 6 | ||||
| -rw-r--r-- | util/inteltool/memory.c | 3 | ||||
| -rw-r--r-- | util/inteltool/pcr.c | 2 |
6 files changed, 27 insertions, 0 deletions
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c index 91f8ebdab9..22bad0e8fa 100644 --- a/util/inteltool/gpio.c +++ b/util/inteltool/gpio.c @@ -1037,6 +1037,8 @@ int print_gpios(struct pci_dev *sb, int show_all, int show_diffs) case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM: case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM: case PCI_DEVICE_ID_INTEL_CANNONPOINT_LP_U_PREM: + case PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_PREM: + case PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_BASE: case PCI_DEVICE_ID_INTEL_C621: case PCI_DEVICE_ID_INTEL_C622: case PCI_DEVICE_ID_INTEL_C624: diff --git a/util/inteltool/gpio_groups.c b/util/inteltool/gpio_groups.c index 25489c20fe..0ff1c8629f 100644 --- a/util/inteltool/gpio_groups.c +++ b/util/inteltool/gpio_groups.c @@ -144,6 +144,8 @@ const struct gpio_community *const *get_gpio_communities(struct pci_dev *const s *community_count = ARRAY_SIZE(apl_communities); return apl_communities; case PCI_DEVICE_ID_INTEL_CANNONPOINT_LP_U_PREM: + case PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_PREM: + case PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_BASE: *community_count = ARRAY_SIZE(cannonlake_pch_lp_communities); *pad_stepping = 16; return cannonlake_pch_lp_communities; diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index 71b4bb0bba..91a8b7e025 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -134,6 +134,12 @@ static const struct { "8th generation (Whiskey Lake family) Core Processor (Mobile)" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_10TH_GEN_U, "10th generation (Icelake family) Core Processor (Mobile)" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_CML_U1, + "10th generation (Comet Lake family) Core Processor (Mobile)" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_CML_U2, + "10th generation (Comet Lake family) Core Processor (Mobile)" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_CML_U3, + "10th generation (Comet Lake family) Core Processor (Mobile)" }, /* Southbridges (LPC controllers) */ { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "371AB/EB/MB" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10, "ICH10" }, @@ -250,6 +256,10 @@ static const struct { "Sunrise Point-LP Y iHDCP 2.2 Premium/Kabylake" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONPOINT_LP_U_PREM, "Cannon Point-LP U Premium/CoffeeLake/Whiskeylake" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_PREM, + "Comet Point-LP U Premium/Cometlake" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_BASE, + "Comet Point-LP U Base/Cometlake" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_H110, "H110" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_H170, "H170" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_Z170, "Z170" }, @@ -437,6 +447,8 @@ static const struct { "Intel(R) Iris Plus Graphics 655" }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IRIS_PLUS_G7, "Intel(R) Iris Plus Graphics G7" }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_UHD_GRAPHICS, + "Intel(R) UHD Graphics" }, }; #ifndef __DARWIN__ diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index e74d744816..e7d32a3b25 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -146,6 +146,8 @@ static inline uint32_t inl(unsigned port) #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_U_IHDCP_PREM 0x9d4e #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_Y_IHDCP_PREM 0x9d4b #define PCI_DEVICE_ID_INTEL_CANNONPOINT_LP_U_PREM 0x9d84 +#define PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_PREM 0x0284 +#define PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_BASE 0x0285 #define PCI_DEVICE_ID_INTEL_H110 0xa143 #define PCI_DEVICE_ID_INTEL_H170 0xa144 #define PCI_DEVICE_ID_INTEL_Z170 0xa145 @@ -293,6 +295,9 @@ static inline uint32_t inl(unsigned port) #define PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_1 0x3ed0 /* Coffeelake (Mobile) */ #define PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_2 0x3e34 /* Whiskeylake (Mobile) */ #define PCI_DEVICE_ID_INTEL_CORE_10TH_GEN_U 0x8a12 /* Icelake U */ +#define PCI_DEVICE_ID_INTEL_CORE_CML_U1 0x9b51 /* Cometlake U (Mobile) */ +#define PCI_DEVICE_ID_INTEL_CORE_CML_U2 0x9b61 /* Cometlake U (Mobile) */ +#define PCI_DEVICE_ID_INTEL_CORE_CML_U3 0x9b71 /* Cometlake U (Mobile) */ /* Intel GPUs */ @@ -362,6 +367,7 @@ static inline uint32_t inl(unsigned port) #define PCI_DEVICE_ID_INTEL_IRIS_PLUS_650 0x5927 #define PCI_DEVICE_ID_INTEL_IRIS_PLUS_655 0x3EA5 #define PCI_DEVICE_ID_INTEL_IRIS_PLUS_G7 0x8A52 +#define PCI_DEVICE_ID_INTEL_UHD_GRAPHICS 0x9b41 #if !defined(__DARWIN__) && !defined(__FreeBSD__) typedef struct { uint32_t hi, lo; } msr_t; diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c index 728d4d6d3a..36d11978f4 100644 --- a/util/inteltool/memory.c +++ b/util/inteltool/memory.c @@ -219,6 +219,9 @@ int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_s case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_E3: case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_1: case PCI_DEVICE_ID_INTEL_CORE_8TH_GEN_U_2: + case PCI_DEVICE_ID_INTEL_CORE_CML_U1: + case PCI_DEVICE_ID_INTEL_CORE_CML_U2: + case PCI_DEVICE_ID_INTEL_CORE_CML_U3: mchbar_phys = pci_read_long(nb, 0x48); mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32; mchbar_phys &= 0x0000007fffff8000UL; /* 38:15 */ diff --git a/util/inteltool/pcr.c b/util/inteltool/pcr.c index c520518705..bc78c336a5 100644 --- a/util/inteltool/pcr.c +++ b/util/inteltool/pcr.c @@ -121,6 +121,8 @@ void pcr_init(struct pci_dev *const sb) case PCI_DEVICE_ID_INTEL_HM370: case PCI_DEVICE_ID_INTEL_CM246: case PCI_DEVICE_ID_INTEL_CANNONPOINT_LP_U_PREM: + case PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_PREM: + case PCI_DEVICE_ID_INTEL_COMETPOINT_LP_U_BASE: case PCI_DEVICE_ID_INTEL_ICELAKE_LP_U: sbbar_phys = 0xfd000000; use_p2sb = false; |