diff options
| -rw-r--r-- | src/drivers/i2c/adm1026/adm1026.c | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/amdfam10/amdfam10_acpi.c | 8 | ||||
| -rw-r--r-- | src/northbridge/ibm/cpc710/cpc710_pci.c | 4 | ||||
| -rw-r--r-- | src/northbridge/ibm/cpc710/cpc710_pci.h | 4 | ||||
| -rw-r--r-- | src/southbridge/amd/sb600/sb600_early_setup.c | 2 |
5 files changed, 11 insertions, 11 deletions
diff --git a/src/drivers/i2c/adm1026/adm1026.c b/src/drivers/i2c/adm1026/adm1026.c index 5f9e4bd9c0..9869100823 100644 --- a/src/drivers/i2c/adm1026/adm1026.c +++ b/src/drivers/i2c/adm1026/adm1026.c @@ -17,7 +17,7 @@ #define CFG1_THERM_HOT 0x10 #define CFT1_DAC_AFC 0x20 #define CFG1_PWM_AFC 0x40 -#define CFG1CONFIG_RESET 0x80 +#define CFG1_RESET 0x80 #define ADM1026_REG_CONFIG2 0x01 #define ADM1026_REG_CONFIG3 0x07 @@ -40,7 +40,7 @@ static void adm1026_enable_monitoring(device_t dev) int result; result = smbus_read_byte(dev, ADM1026_REG_CONFIG1); - result = (result | CFG1_MONITOR) & ~(CFG1_INT_CLEAR | CFG1CONFIG_RESET); + result = (result | CFG1_MONITOR) & ~(CFG1_INT_CLEAR | CFG1_RESET); result = smbus_write_byte(dev, ADM1026_REG_CONFIG1, result); result = smbus_read_byte(dev, ADM1026_REG_CONFIG1); diff --git a/src/northbridge/amd/amdfam10/amdfam10_acpi.c b/src/northbridge/amd/amdfam10/amdfam10_acpi.c index 77fd3ccb12..d0c9baf6fc 100644 --- a/src/northbridge/amd/amdfam10/amdfam10_acpi.c +++ b/src/northbridge/amd/amdfam10/amdfam10_acpi.c @@ -190,7 +190,7 @@ void update_ssdt(void *ssdt) u8 *CBST; u8 *CBBX; u8 *CBS2; - u8 *CONFIG_CBB2; + u8 *CBB2; int i; @@ -208,7 +208,7 @@ void update_ssdt(void *ssdt) HCDN = ssdt+0x57a; //+5 will be next HCDN CBBX = ssdt+0x61f; // CBST = ssdt+0x626; - CONFIG_CBB2 = ssdt+0x62d; // + CBB2 = ssdt+0x62d; // CBS2 = ssdt+0x634; for(i=0;i<HC_NUMS;i++) { @@ -260,10 +260,10 @@ void update_ssdt(void *ssdt) if((CONFIG_CBB == 0xff) && (sysconf.nodes>32)) { *CBS2 = 0x0f; - *CONFIG_CBB2 = (u8)(CONFIG_CBB-1); + *CBB2 = (u8)(CONFIG_CBB-1); } else { *CBS2 = 0x00; - *CONFIG_CBB2 = 0x00; + *CBB2 = 0x00; } } diff --git a/src/northbridge/ibm/cpc710/cpc710_pci.c b/src/northbridge/ibm/cpc710/cpc710_pci.c index 2b6024e5b9..233e119baf 100644 --- a/src/northbridge/ibm/cpc710/cpc710_pci.c +++ b/src/northbridge/ibm/cpc710/cpc710_pci.c @@ -45,7 +45,7 @@ cpc710_pci_init(void) setCPC710_PCI32(CPC710_PCIL0_MSIZE, CPC710_PCI32_MEM_SIZE); setCPC710_PCI32(CPC710_PCIL0_IOSIZE, CPC710_PCI32_IO_SIZE); setCPC710_PCI32(CPC710_PCIL0_SMBAR, CPC710_PCI32_MEM_BASE); - setCPC710_PCI32(CPC710_PCIL0_SIBAR, CPC710_PCI32CONFIG_IO_BASE); + setCPC710_PCI32(CPC710_PCIL0_SIBAR, CPC710_PCI32_IO_BASE); setCPC710_PCI32(CPC710_PCIL0_CTLRW, 0x00000000); setCPC710_PCI32(CPC710_PCIL0_PSSIZE, 0x00000080); setCPC710_PCI32(CPC710_PCIL0_BARPS, 0x00000000); @@ -94,7 +94,7 @@ cpc710_pci_init(void) setCPC710_PCI64(CPC710_PCIL0_MSIZE, CPC710_PCI64_MEM_SIZE); setCPC710_PCI64(CPC710_PCIL0_IOSIZE, CPC710_PCI64_IO_SIZE); setCPC710_PCI64(CPC710_PCIL0_SMBAR, CPC710_PCI64_MEM_BASE); - setCPC710_PCI64(CPC710_PCIL0_SIBAR, CPC710_PCI64CONFIG_IO_BASE); + setCPC710_PCI64(CPC710_PCIL0_SIBAR, CPC710_PCI64_IO_BASE); setCPC710_PCI64(CPC710_PCIL0_CTLRW, 0x02000000); setCPC710_PCI64(CPC710_PCIL0_PSSIZE, 0x00000080); diff --git a/src/northbridge/ibm/cpc710/cpc710_pci.h b/src/northbridge/ibm/cpc710/cpc710_pci.h index 0b3374ebd4..a7f64dfcd8 100644 --- a/src/northbridge/ibm/cpc710/cpc710_pci.h +++ b/src/northbridge/ibm/cpc710/cpc710_pci.h @@ -28,13 +28,13 @@ #define CPC710_PCI32_MEM_SIZE 0xf8000000 #define CPC710_PCI32_MEM_BASE 0xc0000000 #define CPC710_PCI32_IO_SIZE 0xf8000000 -#define CPC710_PCI32CONFIG_IO_BASE 0x80000000 +#define CPC710_PCI32_IO_BASE 0x80000000 //#define CPC710_PCI64_CONFIG 0xff400000 //#define CPC710_PCI64_MEM_SIZE 0xf8000000 //#define CPC710_PCI64_MEM_BASE 0xc8000000 //#define CPC710_PCI64_IO_SIZE 0xf8000000 -//#define CPC710_PCI64CONFIG_IO_BASE 0x88000000 +//#define CPC710_PCI64_IO_BASE 0x88000000 #define CPC710_PCIL0_PSEA 0xf6110 #define CPC710_PCIL0_PCIDG 0xf6120 diff --git a/src/southbridge/amd/sb600/sb600_early_setup.c b/src/southbridge/amd/sb600/sb600_early_setup.c index 75a98866b7..a22585da7e 100644 --- a/src/southbridge/amd/sb600/sb600_early_setup.c +++ b/src/southbridge/amd/sb600/sb600_early_setup.c @@ -430,7 +430,7 @@ static void sb600_devices_por_init(void) /*CIM set this register; but I didn't find its description in RPR. On DBM690T platform, I didn't find different between set and skip this register. - But on Filbert platform, the CONFIG_DEBUG message from serial port on Peanut board can't be displayed + But on Filbert platform, the DEBUG message from serial port on Peanut board can't be displayed after the bit0 of this register is set. pci_write_config8(dev, 0x04, 0x21); */ |