diff options
| -rw-r--r-- | src/mainboard/google/gru/bootblock.c | 8 | ||||
| -rw-r--r-- | src/soc/rockchip/rk3399/Makefile.inc | 2 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/google/gru/bootblock.c b/src/mainboard/google/gru/bootblock.c index 74e02b273f..1166d8a842 100644 --- a/src/mainboard/google/gru/bootblock.c +++ b/src/mainboard/google/gru/bootblock.c @@ -17,6 +17,7 @@ #include <arch/io.h> #include <bootblock_common.h> #include <soc/grf.h> +#include <gpio.h> #include <soc/spi.h> #include <console/console.h> @@ -35,6 +36,13 @@ void bootblock_mainboard_early_init(void) */ write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 0)); + /* + * Let's enable these power rails here, we are already running the SPI + * Flash based code. + */ + gpio_output(GPIO(0, B, 2), 1); /* PP1500_EN */ + gpio_output(GPIO(0, B, 4), 1); /* PP3000_EN */ + if (IS_ENABLED(CONFIG_DRIVERS_UART)) { _Static_assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE, "CONSOLE_SERIAL_UART should be UART2"); diff --git a/src/soc/rockchip/rk3399/Makefile.inc b/src/soc/rockchip/rk3399/Makefile.inc index 387d3770d8..4d5091df76 100644 --- a/src/soc/rockchip/rk3399/Makefile.inc +++ b/src/soc/rockchip/rk3399/Makefile.inc @@ -21,8 +21,10 @@ bootblock-y += ../common/spi.c ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c endif +bootblock-y += ../common/gpio.c bootblock-y += bootblock.c bootblock-y += clock.c +bootblock-y += gpio.c bootblock-y += mmu_operations.c bootblock-y += timer.c |